Rainbow Electronics HT24LC04 - Manual (Page 5)

HT24LC04
Rev. 1.20 5 November 5, 2002
· Acknowledge polling
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the stop condition for a write com-
mand has been issued from the master, the device ini-
tiates the internally timed write cycle. ACK polling can
be initiated immediately. This involves the master
sending a start condition followed by the control byte
for a write command (R/W=0). If the device is still busy
with the write cycle, then no ACK will be returned. If
the cycle is completed, then the device will return the
ACK and the master can then proceed with the next
read or write command. · Write protect
The HT24LC04 can be used as a serial ROM when
the WP pin is connected to VCC. Programming will be
i n h i b i t e d a n d t h e e n t i r e m e m o r y w i l l b e
write-protected.
· Read operations
Read operations are initiated the same way as write
operations with the exception that the read/write se-
lect bit in the device address word is set to one. There
are three read operations: current address read, ran-
dom address read and sequential read.
· Current address read
The internal data word address counter maintains the
last address accessed during the last read or write op-
eration, incremented by one. This address stays valid
between operations as long as the chip power is main-
tained. The address roll over during read from the last
byte of the last memory page to the first byte of the first
page. The address roll over during write from the last
byte of the current page to the first byte of the same
page. Once the device address with the read/write se-
lect bit set to one is clocked in and acknowledged by
the EEPROM, the current address data word is seri-
ally clocked out. The microcontroller does not respond
with an input zero but generates a following stop con-
dition (refer to Current read timing).
· Random read
A random read requires a dummy byte write sequence
to load in the data word address which is then clocked
in and acknowledged by the EEPROM. The
microcontroller must then generate another start con-
dition. The microcontroller now initiates a current ad-
dress read by sending a device address with the
read/write select bit high. The EEPROM acknowl-
edges the device address and serially clocks out the
data word. The microcontroller does not respond with
a zero but does generates a following stop condition
(refer to Random read timing).
A 2 A 1 A 0 S P
D e v i c e a d d r e s s D A T A
A C K
S t o p
S t a r t
S D A
N o A C K
Current read timing
P
D e v i c e a d d r e s s W o r d a d d r e s s
A C K
S t o p
S t a r t
S D A
A C K N o A C K
S
A C K
D A T A
S A 2 A 1 A 0
D e v i c e a d d r e s s
S t a r t
Random read timing
S e n d W r i t e C o m m a n d
S e n d S t o p C o n d i t i o n
t o I n i t i a t e W r i t e C y c l e
S e n d S t a r t
S e n d C o t r o l l B y t e
w i t h R / W = 0
( A C K = 0 ) ?
N e x t O p e r a t i o n
N o
Y e s
Acknowledge polling flow