Rainbow Electronics DS1972 - Manual (Page 13)

DS1972: 1024-Bit EEPROM iButton
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READ SCRATCHPAD COMMAND [AAh]
The Read Scratchpad command allows verifying the target address and the integrity of the scratchpad data. After
issuing the command code, the master begins reading. The first two bytes are the target address. The next byte is
the ending offset/data status byte (E/S) followed by the scratchpad data, which may be different from what the
master originally sent. This is of particular importance if the target address is within the register page or a page in
either Write Protection or EPROM modes. See the Write Scratchpad description for details. The master should
read through the scratchpad (E2:E0 - T2:T0 + 1 bytes), after which it will receive the inverted CRC, based on data
as it was sent by the DS1972. If the master continues reading after the CRC, all data will be logic 1s.
COPY SCRATCHPAD [55h]
The Copy Scratchpad command is used to copy data from the scratchpad to writable memory sections. After
issuing the Copy Scratchpad command, the master must provide a 3-byte authorization pattern, which should have
been obtained by an immediately preceding Read Scratchpad command. This 3-byte pattern must exactly match
the data contained in the three address registers (TA1, TA2, E/S, in that order). If the pattern matches, the target
address is valid, the PF flag is not set, and the target memory is not copy-protected, the AA (Authorization
Accepted) flag is set and the copy begins. All eight bytes of scratchpad contents are copied to the target memory
location. The duration of the device’s internal data transfer is t
PROG
during which the voltage on the 1-Wire bus must
not fall below 2.8V. A pattern of alternating 0s and 1s are transmitted after the data has been copied until the
master issues a Reset Pulse. If the PF flag is set or the target memory is copy-protected, the copy will not begin
and the AA flag will not be set. If the copy command was disturbed due to lack of power or for other reasons, the
master will read a constant stream of FFh bytes until it sends a 1-Wire Reset Pulse. In this case the destination
memory may be incompletely programmed requiring a write scratchpad and copy scratchpad be repeated to
ensure proper programming of the EEPROM. This requires careful consideration when designing application
software that writes to the DS1972 in an intermittent contact environment.
READ MEMORY [F0h]
The Read Memory command is the general function to read data from the DS1972. After issuing the command, the
master must provide the 2-byte target address. After these two bytes, the master reads data beginning from the
target address and may continue until address 008Fh. If the master continues reading, the result will be logic 1s.
The device's internal TA1, TA2, E/S, and scratchpad contents are not affected by a Read Memory command.
1-Wire BUS SYSTEM
The 1-Wire bus is a system that has a single bus master and one or more slaves. In all instances the DS1972 is a
slave device. The bus master is typically a microcontroller. The discussion of this bus system is broken down into
three topics: hardware configuration, transaction sequence, and 1-Wire signaling (signal types and timing). The
1-Wire protocol defines bus transactions in terms of the bus state during specific time slots, which are initiated on
the falling edge of sync pulses from the bus master.
HARDWARE CONFIGURATION
The 1-Wire bus has only a single line by definition; it is important that each device on the bus be able to drive it at
the appropriate time. To facilitate this, each device attached to the 1-Wire bus must have open-drain or tri-state
outputs. The 1-Wire port of the DS1972 is open drain with an internal circuit equivalent to that shown in Figure 8.
A multidrop bus consists of a 1-Wire bus with multiple slaves attached. The DS1972 supports both a Standard and
Overdrive communication speed of 15.4kbps (max) and 125kbps (max), respectively. Note that legacy 1-Wire
products support a standard communication speed of 16.3kbps and Overdrive of 142kbps. The slightly reduced
rates for the DS1972 are a result of additional recovery times, which in turn were driven by a 1-Wire physical
interface enhancement to improve noise immunity. The value of the pullup resistor primarily depends on the
network size and load conditions. The DS1972 requires a pullup resistor of 2.2k
W (max) at any speed.