Pin description, Memory organization – Rainbow Electronics AT24C512 User Manual

Page 3

Advertising
background image

3

AT24C512

1116H–SEEPR–08/02

Pin Description

SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each
EEPROM device and negative edge clock data out of each device.

SERIAL DATA (SDA): The SDA pin is bidirectional for serial data transfer. This pin is
open-drain driven and may be wire-ORed with any number of other open-drain or open
collector devices.

DEVICE/PAGE ADDRESSES (A1, A0): The A1 and A0 pins are device address inputs
that are hardwired or left not connected for hardware compatibility with AT24C128/256.
When the pins are hardwired, as many as four 512K devices may be addressed on a
single bus system (device addressing is discussed in detail under the Device Address-
ing section). When the pins are not hardwired, the default A1 and A0 are zero.

WRITE PROTECT (WP): The write protect input, when tied to GND, allows normal write
operations. When WP is tied high to V

CC

, all write operations to the memory are inhib-

ited. If left unconnected, WP is internally pulled down to GND. Switching WP to V

CC

prior

to a write operation creates a software write protect function.

Memory Organization

AT24C512, 512K SERIAL EEPROM: The 512K is internally organized as 512 pages of
128-bytes each. Random word addressing requires a 16-bit data word address.

Advertising