Rainbow Electronics ATA6626 - Manual (Page 5)

5
4970A–AUTO–01/07
ATA6621/22/24 Development Board
For the ATA6622 and ATA6624 the resistor R3 at pin WD_OSC with the same value of 51 k
Ω
results in the different timing sequence shown in Figure 2-2 :
Figure 2-2. Timing Sequence with R3 = 51 k
Ω
at the ATA6622 and ATA6624
If you want to change the watchdog times mentioned above it is only necessary to change the
value of the external resistor R3 (refer to the corresponding datasheet).
2.4 LIN Interface (LIN, TXD and RXD)
2.4.1 Bus Pin (LIN)
A low-side driver with internal current limitation and thermal shutdown as well as an internal
pull-up resistor in compliance with the LIN specification 2.0 is implemented. LIN receiver
thresholds are compatible with the LIN protocol specification.
At the LIN pin there is a 220-pF capacitor to ground on the board. Additionally, when using the
development board for a LIN master application, there is the opportunity to mount the two nec-
essary extra components diode D2 (LL4148) in series with resistor R1 (1k
Ω
) on the board at
their designated placeholders.
2.4.2 Input Pin (TXD)
This pin is the microcontroller interface to control the state of the LIN output. TXD must be
pulled to ground in order to have the LIN bus low. If TXD is high, the LIN output transistor is
turned off and the bus is in the recessive state, pulled up by the internal resistor. If TXD is low,
the LIN output transistor is turned on and the bus is in the dominant state. An internal timer
prevents the bus line from being driven permanently in the dominant state. If TXD is forced to
low longer than t
DOM
> 20 ms, the LIN bus driver is switched to the recessive state.
2.4.3 Output Pin (RXD)
This pin reports the state of the LIN bus to the microcontroller. LIN high (recessive state) is
reported by a high level at RXD, LIN low (dominant state) is reported by a low level at RXD.
The output has an internal pull-up structure with typ. 5 k
Ω
to VCC.
The output is short-circuit protected.
t
nres
= 4 ms
Undervoltage Reset Watchdog Reset
t
reset
= 4 ms
t
1
= 20 ms
t
trigg
> 200 ns
t
2
= 21 ms
t
2
t
1
t
wd
t
d
= 150 ms
V
CC
= 3.3V/5V
NTRIG
NRES