Rainbow Electronics ATR0620 User Manual

Gps baseband processor atr0620 summary preliminary, Features

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Features

Utilizes the ARM7TDMI

ARM

®

Thumb

®

Processor Core

– High-performance 32-bit RISC Architecture

– High-density 16-bit Instruction Set

– Embedded ICE (In-circuit Emulation)

128 Kbytes Internal RAM

Fully Programmable External Bus Interface (EBI)

– Maximum External Address Space of 64 MB

– Up to Four Chip Selects

– Software Programmable 8-/16-bit External Data Bus

16-channel GPS Correlator

– Accuracy: TBD

– Time to First Fix: TBD

8-channel Peripheral Data Controller (PDC)

8-level Priority, Individually Maskable, Vectored Interrupt Controller

– Three External Interrupts

20 Programmable I/O Lines

Three USARTs

– Two Dedicated Peripheral Data Controller (PDC) Channels per USART

Master/Slave SPI Interface

– Two Dedicated Peripheral Data Controller (PDC) Channels

– 8- to 16-bit Programmable Data Length

– Four External Slave Chip Selects

Programmable Watchdog Timer

Power Management Controller (PMC)

– CPU and Peripherals Can Be Deactivated Individually

Clock Manager (CLM)

– Geared Master Clock to Reduce Power Consumption

– Sleep State with Disabled Master Clock

PWM Controller

– Two PWM Signals

Real Time Clock (RTC)

– Time in GPS Format and 15-bit Fractional Part of a Second

– Programmable Interrupt

– Timer with a 8-bit Fractional Part of a Second and Parallel Load

2.3V to 3.6V or 1.8V Supply Voltage

Includes Power Supervisor

Battery Backup Memory

9 mm

×

9 mm 100-pin BGA Package

GPS Baseband
Processor

ATR0620

Summary

Preliminary

Rev. 4574CS–GPS–05/05

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