Rainbow Electronics AT27BV020 - Manual (Page 2)

AT27BV020
2
Atmel’s innovative design techniques provide fast speeds
that rival 5V parts while keeping the low power consump-
tion of a 3V supply. At V
C C
= 2.7V, any byte can be
accessed in less than 90 ns. With a typical power dissipa-
tion of only 18 mW at 5 MHz and V
CC
= 3V, the AT27BV020
consumes less than one fifth the power of a standard 5V
EPROM. Standby mode supply current is typically less
than 1 µA at 3V. The AT27BV020 simplifies system design
and stretches battery lifetime even further by eliminating
the need for power supply regulation
The AT27BV020 is available in industry standard JEDEC
approved one-time programmable (OTP) plastic PLCC,
TSOP and VSOP packages, as well as a 42-ball, 1 mm
pitch. All devices feature two-line control (CE, OE) to give
designers the flexibility to prevent bus contention.
The AT27BV020 operating with V
CC
at 3.0V produces TTL
level outputs that are compatible with standard TTL logic
devices operating at V
CC
= 5.0V. At V
CC
= 2.7V, the part is
compatible with JEDEC approved low voltage battery oper-
ation (LVBO) interface specifications. The device is also
capable of standard 5-volt operation making it ideally suited
for dual supply range systems or card products that are
pluggable in both 3-volt and 5-volt hosts.
Atmel's AT27BV020 has additional features to ensure high
quality and efficient production use. The Rapid
™ Program-
ming Algorithm reduces the time required to program the
part and guarantees reliable programming. Programming
time is typically only 100 µs/byte. The Integrated Product
Identification Code electronically identifies the device and
manufacturer. This feature is used by industry standard
programming equipment to select the proper programming
algorithms and voltages. The AT27BV020 programs
exactly the same way as a standard 5V AT27C020 and
uses the same programming equipment.
System Considerations
Switching between active and standby conditions via the
Chip Enable pin may produce transient voltage excursions.
Unless accommodated by the system design, these tran-
sients may exceed data sheet limits, resulting in device
nonconformance. At a minimum, a 0.1 µF high frequency,
low inherent inductance, ceramic capacitor should be uti-
lized for each device. This capacitor should be connected
between the V
CC
and Ground terminals of the device, as
close to the device as possible. Additionally, to stabilize the
supply voltage level on printed circuit boards with large
EPROM arrays, a 4.7 µF bulk electrolytic capacitor should
be utilized, again connected between the V
CC
and Ground
terminals. This capacitor should be positioned as close as
possible to the point where the power supply is connected
to the array.
Block Diagram