Rainbow Electronics ISD4004 - Manual (Page 7)

ISD4004 Series
3 ISD
NON-INVERTING ANALOG INPUT (ANA IN+)
This pin is the non-inverting analog input that trans-
fers the signal to the device for recording. The an-
alog input amplifier can be driven single ended or
differentially. In the single-ended input mode, a
32 mVp-p (peak-to-peak) maximum signal should
be capacitively connected to this pin for optimal
signal quality. This capacitor value, together with
the 3 K
W input impedance of ANA IN+, is selected
to give cutoff at the low frequency end of the
voice passband. In the differential-input mode,
the maximum input signal at ANA IN+ should be
16 mVp-p for optimal signal quality. The circuit
connections for the two modes are shown in Fig-
ure 2 on page 2.
INVERTING ANALOG INPUT (ANA IN–)
This pin is the inverting analog input that transfers
the signal to the device for recording in the differ-
ential-input mode. In this differential-input mode,
a 16 mVp-p maximum input signal at ANA IN–
should be capacitively coupled to this pin for op-
timal signal quality as shown in the ISD4004 Series
ANA IN Modes, Figure 2. This capacitor value
should be equal to the coupling capacitor used
on the ANA IN+ pin. The input impedance at ANA IN–
is nominally 56 K
W. In the single-ended mode, ANA
IN– should be capacitively coupled to V
SSA
through a capacitor equal to that used on the
ANA IN+ input.
AUDIO OUTPUT (AUD OUT)
This pin provides the audio output to the user.
It is capable of driving a 5 K
W impedance. It is
recommended that this pin be AC coupled.
NOTE The AUDOUT pin is always at 1.2 volts when
the device is powered up. When in play-
back, the output buffer connected to this
pin can drive a load as small as 5 KW.
When in record, a resistor connects AUD-
OUT to the internal 1.2 volt analog ground
supply. This resistor is approximately
850 KW, but will vary somewhat according
to the sample rate of the device. This rel-
atively high impedance allows this pin to
be connected to an audio bus without
loading it down.
SLAVE SELECT (SS)
This input, when LOW, will select the ISD4004
device.
MASTER OUT SLAVE IN (MOSI)
This is the serial input to the ISD4004 device. The
master microcontroller places data on the MOSI
line one half-cycle before the rising clock edge to
be clocked in by the ISD4004 device.
MASTER IN SLAVE OUT (MISO)
This is the serial output of the ISD4004 device. This
output goes into a high-impedance state if the
device is not selected.
SERIAL CLOCK (SCLK)
This is the clock input to the ISD4004. It is generat-
ed by the master device (microcontroller) and is
used to synchronize data transfers in and out of
the device through the MISO and MOSI lines. Data
is latched into the ISD4004 on the rising edge of
SCLK and shifted out of the device on the falling
edge of SCLK.
INTERRUPT (INT)
The ISD4004 interrupt pin goes LOW and stays LOW
when an Overflow (OVF) or End of Message (EOM)
marker is detected. This is an open drain output
pin. Each operation that ends in an EOM or Over-
flow will generate an interrupt including the mes-
sage cueing cycles. The interrupt will be cleared
the next time an SPI cycle is initiated. The interrupt
status can be read by an RINT instruction.
Overflow Flag (OVF)—The Overflow flag indi-
cates that the end of the ISD4004’s analog mem-
ory has been reached during a record or
playback operation.
End of Message (EOM)—The End-of-Message
flag is set only during playback operation when an
EOM is found. There are eight EOM flag position
options per row.