Rainbow Electronics ISD5100 - Manual (Page 29)

ISD5100 – SERIES
Publication Release Date: October, 2003
- 29 - Revision 0.2
7.4.2. ISD5100 Series Analog Structure (left half) Description
IN PUT
AGC AMP
SU M 1
Σ
2 (S1 M1 ,S1M 0)
SO UR CE
MU X
SUM1 SU MMING
AMP
AUX IN AMP
FILTO
SU M1
MU X
AN A IN AMP
AR RAY
2 (S1S1 ,S1S0)
(INS0 )
1 5 14 1 3 12 1 1 10 9 8 7 6 5 4 3 2 1 0
A IG1 A IG 0 A IPD AX G1 A XG0 A XPD INS0 A OS2 A O S1 AOS0 A OPD OPS1 OPS0 OPA1 OPA 0 V LPD C FG 0
1 5 14 1 3 12 1 1 10 9 8 7 6 5 4 3 2 1 0
VLS1 VL S0 V OL 2 VOL1 V OL 0 S1S1 S1 S0 S1M1 S1 M0 S2 M1 S2M0 FLS0 FLD1 FLD0 FL PD A GPD C FG 1
INP
INSO Source
0 AGC AMP
1 AUX IN AMP
S1M1 S1M0 SOURCE
0 0 BOTH
0 1 SUM1 MUX ONLY
1 0 INP Only
1 1 Power Down
S1S1 S1S0 SOURCE
0 0 ANA IN
0 1 ARRAY
1 0 FILTO
1 1 N/C