Rainbow Electronics ATF22LV10CQZ - Manual (Page 5)

ATF22LV10C(Q)Z
5
Input Test Waveforms and
Measurement Levels Output Test Loads
Note: Similar competitors devices are specified with slightly
different loads. These load differences may affect output
signals’ delay and slew rate. Atmel devices are tested
with sufficient margins to meet compatible device specifi-
cation conditions.
Notes: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
Power-up Reset
The registers in the ATF22LV10CZ/CQZ are designed to
reset during power-up. At a point delayed slightly from V
CC
crossing V
RST
, all registers will be reset to the low state.
The output state will depend on the polarity of the buffer.
This feature is critical for state machine initialization.
However, due to the asynchronous nature of reset and the
uncertainty of how V
CC
actually rises in the system, the
following conditions are required:
1. The V
CC
rise must be monotonic and start
below 0.7V.
2. The clock must remain stable during T
PR
.
3. After T
PR
, all input and feedback setup times must
be met before driving the clock pin high.
Preload of Register Outputs
The ATF22LV10CZ/CQZ’s registers are provided with cir-
cuitry to allow loading of each register with either a high or
a low. This feature will simplify testing since any state can
be forced into the registers to control test sequencing. A
JEDEC file with preload is generated when a source file
with vectors is compiled. Once downloaded, the JEDEC file
preload sequence will be done automatically by most of the
approved programmers after the programming.
Electronic Signature Word
There are 64 bits of programmable memory that are always
available to the user, even if the device is secured. These
bits can be used for user-specific data.
Security Fuse Usage
A single fuse is provided to prevent unauthorized copying
of the ATF22LV10CZ/CQZ fuse patterns. Once pro-
grammed, fuse verify and preload are inhibited. However,
the 64-bit User Signature remains accessible.
The security fuse should be programmed last, as its effect
is immediate.
Programming/Erasing
Programming/erasing is pe rformed using standard
P L D p r o g r a m m e r s. S e e C M O S P L D P r o g r a m m i n g
Hardware & Software Support for information on software/
programming.
Pin Capacitance
f = 1 MHz, T = 25
°C (1)
Typ Max Units Conditions
C
IN
5 8 pF V
IN
= 0V
C
I/O
6 8 pF V
OUT
= 0V
Parameter Description Typ Max Units
T
PR
Power-up
Reset Time 600 1000 ns
V
RST
Power-up
Reset Voltage 2.3 2.7 V