Rainbow Electronics MAX1801 User Manual
Page 10
MAX1801
Digital Camera Step-Up Slave
DC-DC Controller
10
______________________________________________________________________________________
Inductor Selection
Select the inductor for either continuous or discontinuous
current. Continuous conduction generally is the most effi-
cient. Use discontinuous current if the step-up ratio
(V
OUT
/ V
IN
) is greater than 1 / ( 1 – D
MAX
).
Continuous Inductor Current
For most MAX1801 step-up designs, a reasonable
inductor value (L
IDEAL
) can be derived from the follow-
ing equation, which sets continuous peak-to-peak
inductor current at 1/3 the DC inductor current:
where D, the duty cycle, is given by:
In these equations, V
SW
is the voltage drop across the
N-channel MOSFET switch, and V
D
is the forward volt-
age drop across the rectifier. Given L
IDEAL
, the consis-
tent peak-to-peak inductor current is 0.333 I
OUT
/ (1 – D).
The maximum inductor current is 1.167 I
OUT
/ (1 – D).
Inductance values smaller than L
IDEAL
can be used;
however, the maximum inductor current will rise as L is
reduced, and a larger output capacitance will be
required to maintain output ripple.
The inductor current will become discontinuous if I
OUT
decreases by more than a factor of six from the value
used to determine L
IDEAL
.
Discontinuous Inductor Current
In the discontinuous mode of operation, the MAX1801
controller regulates the output voltage by adjusting the
duty cycle to allow adequate power transfer to the load.
To ensure regulation under worst-case load conditions
(maximum I
OUT
), choose:
The peak inductor current is V
IN
D
MAX
/ (L f
OSC
).
The inductor’s saturation current rating should meet or
exceed the calculated peak inductor current.
Input and Output Filter Capacitors
The input capacitor (C
IN
) in step-up designs reduces
the current peaks drawn from the battery or input
power source and lessens switching noise in the con-
troller. The impedance of the input capacitor at the
switching frequency should be less than that of the
input source so that high-frequency switching currents
do not pass through the input source.
The output capacitor is required to keep the output volt-
age ripple small and to ensure stability of the regulation
control loop. The output capacitor must have low
impedance at the switching frequency. Tantalum and
ceramic capacitors are good choices. Tantalum capac-
itors typically have high capacitance and medium-to-
low equivalent series resistance (ESR) so that ESR
dominates the impedance at the switching frequency.
In turn, the output ripple is approximately:
V
RIPPLE
≈ I
L(PEAK)
ESR
where I
L(PEAK)
is the peak inductor current.
Ceramic capacitors typically have lower ESR than tan-
talum capacitors, but with relatively small capacitance
that dominates the impedance at the switching fre-
quency. In turn, the output ripple is approximately:
V
RIPPLE
≈ I
L(PEAK)
Z
C
where IL(PEAK) is the peak inductor current, and ZC
≈
1 / (2 p fOSC COUT ).
See the Compensation Design section for a discussion
of the influence of output capacitance and ESR on reg-
ulation control loop stability.
The capacitor voltage rating must exceed the maximum
applied capacitor voltage. For most tantalum capaci-
tors, manufacturers suggest derating the capacitor by
applying no more than 70% of the rated voltage to the
capacitor. Ceramic capacitors are typically used up to
the voltage rating of the capacitor. Consult the manu-
facturer’s specifications for proper capacitor derating.
Bypass Capacitors
If the MAX1801 is placed far from the MAX1800 or
MAX1802 master IC, noise from switching circuits can
affect the MAX1801. Should this be the case, bypass
REF and IN with 0.1µF or greater ceramic capacitors. If
noise is not a problem or if the MAX1801 is placed close
to the master IC, then no extra bypassing is required.
MOSFET Selection
The MAX1801 controller drives an external logic-level
N-channel MOSFET as the circuit switch element. The
key selection parameters are as follows:
• On-resistance (R
DS(ON)
)
• Maximum drain-to-source voltage (V
DS(MAX)
)
• Minimum threshold voltage (V
TH(MIN)
)
• Total gate charge (Q
g
)
• Reverse transfer capacitance (C
RSS
)
L
V
D
I
f
OUT
MAX
OUT
OSC
≤
2
D
V
V
V
IN
OUT
D
≈ −
+
1
L
V
V
D
D
I
f
IDEAL
IN
SW
OUT
OSC
=
−
−
3
1
(
)
(
)