Rainbow Electronics MAX3580 - Manual (Page 18)

MAX3580
Direct-Conversion TV Tuner
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Applications Information
Band Selection
The MAX3580 is designed to be suitable for operation
in the 170MHz to 230MHz VHF-III band and in the
470MHz to 878MHz UHF band.
RF Inputs
A switch selects either RFIN or RFIN2 as the input to the
single-ended broadband matched LNA. This switch is
programmed through the RFS bit (bit 5) of register 0x05.
The LNA provides a continuous gain control range of
typically 50dB before the signal is downconverted.
For optimal matching above 600MHz, add a 5nH to
6nH inductor in series with a capacitor at either of the
RF input. Application Note:
Front End Diplexer Filter for
MAX3580 is available, detailing the implementation of a
UHF and VHF simple diplexer. This simple diplexerl
improves strong-signal-handling capabilities of the
MAX3580.
DC-Offset Cancellation
The MAX3580 features an on-chip fast-settling, DC-off-
set cancellation circuitry that requires no off-chip com-
ponents. Note that the offset correction circuit is not
enabled when the device is powered up. To enable the
offset correction circuit, program the DC-Offset Control
Register to the recommended default setting.
When active, the offset correction circuit creates a
highpass characteristic in the signal path with a typical
corner frequency of 200Hz, and the residual DC offset
can be as high as ±70mV.
Gain Control
The MAX3580 features two VGA circuits that can be
used to achieve the optimum SNR. The two circuits can
be driven independently by the baseband controller,
which allows balancing the gain based on SNR measure-
ments in the digital demodulator. If only one gain control
voltage can be provided by the digital demodulator, the
RF VGA is controlled by the baseband power detector of
the MAX3580. See the
Baseband Power Detector sec-
tion. In this operation mode, the baseband gain is set by
an amplitude detector in the digital demodulator.
Baseband Power Detector
The MAX3580 baseband power detector compares the
total weighted receive input signal within approximately
2 channels of the wanted channel to a programmable
threshold. This threshold can be programmed to differ-
ent values with the PD_TH<2:0> bits in the Baseband
Control Register.
To close the RF gain control loop, connect the 300µA
control current sink of the power detector (pin
OVLD_DET) to V
CC with a 10kΩ pullup resistor. The
resulting voltage is fed with an RC lowpass to the
RF_AGC input.
Synthesizer Loop Filters
A second-order lowpass loop filter is used to connect
the PLL to the RF local oscillator. A loop filter bandwidth
of 30kHz is optimal for fractional PLL spurs and integrat-
ed LO phase noise. Refer to the EV kit data sheet for the
recommended loop-filter component values.
Crystal-Oscillator Interface
The MAX3580 reference oscillator circuitry can be used
either as a high-impedance reference input driven by
an external source, or be configured as a crystal oscil-
lator. In the latter case, the resulting frequency can be
used to drive the digital demodulator chip through the
buffered reference output of the MAX3580. When using
an external reference oscillator, drive the XB input
through an AC-coupling capacitor with amplitude of
approximately 1.5V
P-P , and leave XE unconnected.
Note that the phase noise of the external reference
needs to exceed -140dBc/Hz at offsets of 1kHz to
100kHz. When connecting directly to a crystal, see the
Typical Application Circuit for the required topology.
For particular capacitor values, possible changes to
accommodate for different crystal frequencies, crystal
load-capacitance requirements, and crystal power-dis-
sipation requirements, refer to the EV kit data sheet.