3 chipset, Northbridge configuration 2.4.3 chipset – Asus M2N68-CM User Manual
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ASUS M2N68-CM
2-25
NorthBridge Chipset Configuration
Memory Configuration
ECC Configuration
NorthBridge Configuration
2.4.3
Chipset
The Chipset menu allows you to change the advanced chipset settings. Select an
item then press <Enter> to display the sub-menu.
Advanced Chipset Setting
WARNING: Setting wrong values in below
sections may cause system to malfunction.
NorthBridge Configuration
Southbridge Configuration
Memory Options &
Information
Memory Configuration
Enable Bank Memory
Interleaving
Memory Configuration
Bank Interleaving
[Disabled]
Channel Interleaving
[Disabled]
Enable Clock to All DIMMs
[Disabled]
MemClk Tristate C3/ATLVID
[Disabled]
Memory Hole Remapping
[Enabled]
DCT Unganged Mode
[Auto]
Power Down Enable
[Enabled]
Bank Interleaving [Disabled]
Allows you to disable the bank memory interleaving or set it to [Auto] mode.
Configuration options: [Disabled] [Auto]
Channel Interleaving [Disabled]
Allows you to select the channel memory interleaving.
Configuration options: [Disabled] [Address bits 6] [Address bits 12] [XOR of
Address bits [20:16,6] ] [XOR of Address bits [20:16,9]