AAEON GENE-QM87 - Manual (Page 57)

S u b C o m p a c t B o a r d G E N E - Q M 8 7
Chapter 2 Quick Installation Guide 2-44
12
DDC_DATA I/O +5V
13
HSYNC OUT
14
VSYNC OUT
15
DDC_CLK I/O +5V
DVI
Pin Pin Name Signal Type Signal Level
1
TMDS_DAT2+ DIFF
2
TMDS_DAT2- DIFF
3
GND GND
4
VGA_DDC_CLK I/O
5
VGA_DDC _DATA I/O
6
DVI_DDC_CLK I/O +5V
7
DVI_DDC_DATA I/O +5V
8
VSYNC OUT
9
TMDS_DAT1- DIFF
10 TMDS_DAT1+ DIFF
11
GND GND
12
TMDS_DAT3- DIFF
13
TMDS_DAT3+ DIFF
14
+5V PWR +5V