IEI Integration NANO-HM650 - Manual (Page 66)

NANO-HM650 EP IC S BC
P a g e 51
Pin Description
3-4 and 5-6 1600 x 1200 (48-bit)
1-2 and 3-4 and 5-6 1280 x 768 (18-bit)
7-8 1200 x 800 (18-bit)
1-2 and 7-8 1366 x 768 (24-bit)
3-4 and 7-8 1440 x 900 (36-bit)
1-2 and 3-4 and 7-8 1440 x 900 (48-bit)
5-6 and 7-8 1680 x 1050 (48-bit)
1-2 and 5-6 and 7-8 1920 x 1080 (48-bit)
3-4 and 5-6 and 7-8 1920 x 1200 (48-bit)
Table 4-5: LVDS Screen Resolution Jumper Settings
Figure 4-10: LVDS Screen Resolution Jumper Locations
4.4.5 LVDS Vo lta g e S e le c t J u m p e r
WARNING:
Incorrect voltages can destroy the LCD panel. Make sure to select a
voltage that matches the voltage required by the LCD panel.
J u m p e r La b e l: J _VLVDS 1
J u m p e r Typ e : 6-pin header
J u m p e r S e ttin g s : See Table 4-6