IEI Integration WAFER-LX v1.0 User Manual
User manual, Wafer-lx, 5” profile wafer embedded board
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Table of contents
Document Outline
- WAFER-LX
- Revision History
- Copyright Notice
- Trademarks
- Table of Contents
- List of Tables
- List of Figures
- Safety Notice
- ESD Precautions
- Conventions Used in This Manual
- Software Updates
- WAFER-LX_CH1.pdf
- WAFER-LX_CH2.pdf
- Functional Description
- 2.1 CPU, Memory, and VIA Chipsets
- Block Diagram
- Important Features
- 2.2 External Interfaces
- 2.2.1 Internal Connectors
- PIN
- DESCRIPTION
- PIN
- PIN
- PIN
- DESCRIPTION
- PIN
- DESCRIPTION
- PIN
- DESCRIPTION
- PIN
- DESCRIPTION
- PIN
- DESCRIPTION
- PIN
- DESCRIPTION
- PIN
- DESCRIPTION
- PIN
- DESCRIPTION
- PIN
- DESCRIPTION
- PIN
- DESCRIPTION
- PIN
- DESCRIPTION
- I/O Address
- DESCRIPTION
- PIN
- DESCRIPTION
- PIN
- DESCRIPTION
- PIN
- DESCRIPTION
- PIN
- PIN
- DESCRIPTION
- PIN
- DESCRIPTION
- PIN
- DESCRIPTION
- PIN
- DESCRIPTION
- PIN
- DESCRIPTION
- PIN
- DESCRIPTION
- PIN
- DESCRIPTION
- PIN
- DESCRIPTION
- PIN
- PIN
- DESCRIPTION
- PIN
- 2.2.2 Front Panel Connectors
- Functional Description
- WAFER-LX_CH3.pdf
- WAFER-LX_CH4.pdf
- WAFER-LX_APXA.pdf
- WAFER-LX_APXB.pdf
- WAFER-LX_APXC.pdf