Cirrus Logic CS4228A - Manual (Page 3)

CS4228A
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3.7 Control Port Signals ......................................................................................................... 18
3.7.1 SPI Mode ............................................................................................................ 18
3.7.2 I2C Mode ............................................................................................................ 18
3.8 Control Port Bit Definitions .............................................................................................. 19
3.9 Power-up/Reset/Power Down Mode ............................................................................... 19
3.10 Power Supply, Layout, and Grounding .......................................................................... 20
4. REGISTER QUICK REFERENCE .......................................................................................... 21
5. REGISTER DESCRIPTIONS .................................................................................................. 22
5.1 Memory Address Pointer (MAP) ..................................................................................... 22
5.2 CODEC Clock Mode ........................................................................................................ 22
5.3 Chip Control ..................................................................................................................... 22
5.4 ADC Control .................................................................................................................... 23
5.5 DAC Mute1 Control ......................................................................................................... 23
5.6 DAC Mute2 Control ......................................................................................................... 24
5.7 DAC De-emphasis Control .............................................................................................. 24
5.8 Digital Volume Control ..................................................................................................... 24
5.9 Serial Port Mode .............................................................................................................. 25
5.10 Chip Status .................................................................................................................... 25
6. PIN DESCRIPTION ................................................................................................................. 26
7. PARAMETER DEFINITIONS .................................................................................................. 29
8. PACKAGE DIMENSIONS ...................................................................................................... 31
LIST OF FIGURES
Figure 1. Serial Audio Port Master Mode Timing ............................................................................ 9
Figure 2. Serial Audio Port Slave Mode Timing .............................................................................. 9
Figure 3. SPI Control Port Timing ................................................................................................. 10
Figure 4. I2C Control Port Timing ................................................................................................. 11
Figure 5. I2C Mode SCL Buffer Example...................................................................................... 11
Figure 6. Recommended Connection Diagram............................................................................. 12
Figure 7. Optional Line Input Buffer .............................................................................................. 13
Figure 8. Passive Output Filter with Mute ..................................................................................... 14
Figure 9. Butterworth Output Filter with Mute ............................................................................... 14
Figure 10. I
2
S Serial Audio Formats ............................................................................................. 16
Figure 11. Left Justified Serial Audio Formats .............................................................................. 16
Figure 12. Right Justified Serial Audio Formats............................................................................ 17
Figure 13. One Line Data Serial Audio Format ............................................................................. 17
Figure 14. Control Port Timing, SPI Slave Mode Write................................................................. 18
Figure 15. Control Port Timing, I2C Slave Mode Write ................................................................. 19
Figure 16. Control Port Timing, I2C Slave Mode Read................................................................. 19
LIST OF TABLES
Table 1. Serial Audio Port Input Channel Allocations ................................................................... 16
Table 2. User Registers ................................................................................................................ 21
Table 3. Common Master Clock Frequencies.............................................................................. 27