8 component selection, 9 emc components, Grounding and layout – Cirrus Logic CRD4299-1 AVR User Manual

Page 8: 1 partitioned voltage and ground planes, 2 cs4299 layout notes, Audio performance evaluation, 1 plots

Advertising
background image

CRD4299-1 AMR

8

DS319RD1A1

3.8 Component Selection

Great attention was given to the particular compo-
nents on the CRD4299-1 AMR board with cost,
performance, and package selection as the most im-
portant factors. Listed are some of the guidelines
used in the selection of components:

No components smaller than 0805 package

Use single package components, no resistor
packs

Right-angled headers for all internal connec-
tions to provide sufficient headroom for the
jacks

Dual footprint for XTAL. HC-49S, and small
circular CA-301 pin-in-hole package

Dual footprint for +5 V regulator. Surface
mount and pin-in-hole package are supported.

3.9 EMC Components

A number of capacitors and inductors are included
to help the board meet EMC compliance tests, such
as FCC Part 15. Modifying this selection of compo-
nents without EMC testing could cause EMC com-
pliance failure.

4. GROUNDING AND LAYOUT

4.1 Partitioned Voltage and Ground Planes

The pinout of the CS4299 allows the ground split to
completely separate digital signals on one side and
analog signals on the other. This split is located
very close to the CS4299 so analog and digital
ground return currents originating from the
CS4299 may flow through their respective ground
planes. A bridge is made across the split to main-
tain the proper reference potential for each ground
plane.

The area around the crystal oscillator and the two
XTAL signals is filled with copper on the top and
bottom sides and attached to digital ground. This
ground plane serves to keep noise from coupling

onto these pins. All data converters are highly sus-
ceptible to noise on the crystal pins.

A separate chassis ground provides a reference
plane for all of the EMC components. The chassis
ground plane is connected to the analog ground
plane at the external jacks.

4.2 CS4299 Layout Notes

Please refer to the CS4299 Datasheet [3] on how
the area under the chip should be partitioned and
how the bypass capacitors should be placed. Pay
close attention to the suggestions for the bypass ca-
pacitors on REFFLT, AFLT1, AFLT2, and the
power supply capacitors. The pinout of the CS4299
is designed to keep digital and analog signals from
crossing when laying out the board.

5. AUDIO PERFORMANCE
EVALUATION

In the below reference designators, the letters in pa-
renthesis designate the full-scale value for that par-
ticular I/O.These reference designators are used in
the following tables to help clarify which full-scale
value applies to the particular measurement. Val-
ues referenced to digital numbers on the PC are list-
ed with the (d) suffix.

5.1 Plots

In the following plots, stereo measurements have
two sets of data per plot and two vertical axes.
Above each vertical axis is a label indicating a
channel that relates to that axis. The data set ex-
tends beyond the vertical axis to indicate its associ-
ation with that axis. Using Figure 1 as an example,
the top set of data extends beyond the right vertical
axis, which is labeled at the top “RIGHT’, indicat-
ing that the top set of data is the right channel and
associated with the right vertical axis. Likewise,
the bottom set of data extends beyond the left ver-
tical axis which is labeled at the top “LEFT”, indi-
cating that the bottom set of data is the left channel
and associated with the left vertical axis.

Advertising