Figure 6.typical connection diagram, hardware mode, Figure 6, Cs4362a – Cirrus Logic CS4362A User Manual
Page 20
20
DS617F2
CS4362A
VLS
CS4362A
MCLK
VD
AOUTA1+
8
32
0.1 µF
+
1 µF
+2.5 V
SDIN1
9
1 µF
0.1 µF
+
+
20
21
FILT+
CMOUT
7
6
LRCK
SCLK
SDIN3
SDIN2
39
40
0.1 µF
47 µF
VA
0.1 µF
+
1 µF
0.1 µF
+1.8 V to +5 V
+5 V
4
43
13
AOUTA1-
AOUTB1+
38
37
AOUTB1-
AOUTA2+
35
36
AOUTA2-
AOUTB2+
34
33
AOUTB2-
AOUTA3+
29
30
AOUTA3-
AOUTB3+
28
27
Analog Conditioning
and Muting
AOUTB3-
11
VLC
0.1 µF
+1.8 V to +5 V
18
DSD
2
48
DSDB2
3
42
M3(DSD_SCLK)
DSDA1
DSDB3
DSDA3
DSDB1
DSDA2
46
47
1
M2
M1
M0
RST
47 K
Ω
VLS
Note
DSD
Note
DSD
Note
DSD
: For DSD operation:
remain static high.
2) M3 PCM stand-alone configuration
pin becomes DSD_SCLK
22
MUTEC6
Analog Conditioning
and Muting
23
MUTEC5
Analog Conditioning
and Muting
24
MUTEC4
Analog Conditioning
and Muting
25
MUTEC3
Analog Conditioning
and Muting
26
MUTEC2
Analog Conditioning
and Muting
41
MUTEC1
Stand-Alone
Mode
Configuration
1) LRCK must be tied to VLS and
31
GND
GND
5
TST
10, 12,
14, 44, 45
Digital
Audio
Source
PCM
Audio
Source
220 Ω
470 Ω
470 Ω
16
15
19
17
47 K
Ω
Optional
Figure 6. Typical Connection Diagram, Hardware Mode