3 introduction to the crd48l10 kit, 3 introduction to the crd48l10 kit -2 – Cirrus Logic CRD48L10 User Manual

Page 6

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2

1.3 Introduction to the CRD48L10 Kit

Figure 1-1. CRD48L10-4in4out Block Diagram

The main components to be familiar with on the board are:

CS48L10 DSP

CS42L73 Ultra Low-power CODEC

CS35L01 Mono Class-D Amplifier

CS8416 S/PDIF Rx

CS8406 S/PDIF Tx

Silicon Labs

C8051F930 MCU

The main purpose of this board is to allow a customer to evaluate the Cirrus Logic CS48L10 DSP and other Cirrus Logic
analog semiconductors in a complete audio subsystem.

The Silicon Labs MCU handles the SPI, I²C, and GPIO to control the board components. USB control of the DSP is
possible by connecting the CDB-MCU-DEBUG dongle to the JP2 header.

1.3 Introduction

to

the CRD48L10 Kit

Fig. 1-2

shows a picture of the CRD48L10-4in4out with labels on the important connections.

Fig. 1-3

shows a picture of

the CRD48L10 MCU-USER-INTERFACE board.

Fig. 1-4

shows a picture of the CDB-MCU-DEBUG board.

Fig. 1-5

shows

a picture of the supplied ribbon cables.

Fig. 1-6

shows a picture of the supplied mini-USB and 1/8” to RCA cables.

Fig. 1-7

shows a picture of the TOSLINK to mini TOSLINK adapter.

SiLab

MCU

SP

I

I2C

HP

EAR

SPKR-L

+1v8

DSP

FLASH

SCP Probe HDR

(SPI, I2C)

+5V -> +4v0

+3v3 -> +1v8

+3v3 -> +1v0 / +1v2

Control & MP3

US
B

Digital MIC

Header

Line
Out

HE
A

D

E

R

MIC1

MIC2

CS42L73

CODEC

AS
P

SDI

CHAS

CS48L10

DSP

I2S DAI2

I2C

I2S

Clocks

SCP

+1v0 / +1v2

+1v8

+1v8
+5v0

Current

Sense

Header

JP2 CTRL HDR

I2S DAO2

MCLK

REF
CLK

Line In

SD
O

XS
P

CL
O

C

K

S

SD
I

I2S DAI1

I2S DAO1

CS8416

CS8406

RMCK

+3v3

+3v3

Mini -

OPTICAL

RX

Mini-

OPTICAL

TX

CRD48L10 – 4IN4OUT

Level Translation

H

E

AD
ER

SPKR-R

CS35L01

VS
P

CL
O

C

K

S

SDI

SD
O

G

S

M

T

e

llit

H
D

R

+3v3 -> +1v8 (Translator VL )

I2S Probe HDR (DAI[2:1], DAO[2:1], Clocks)

L

e

ve
l T
ra

n

sl

a

tio

n

+5V -> +3v3 (SPDIF)

12.288 MHz

OSC

MCLK1

Level Translation

CL
O

C

K

S

SD
O

Level Translation

Do

n

g

le

A

c

ti

ve

+4v0 -> +3.3V

+4v0

+3v0

Level Translation

c

USB +5V

c

INPUT MODE
SELECT

LC
D

LC
D

B

u

tton bo

ar

d

JP
6

JP
1

INPUT SOURCE DISPLAY

I/O Expander

HE
A

D

E

R

u

HDM

I

Level

Translation

CLK HDR

Coax

RX

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