Cirrus Logic CS5461A - Manual (Page 19)

CS5461A
DS661F3 19
EXAMPLE #2:
The required number of pulses per unit energy present
on E1 is specified to be 500 pulses per kWhr, given that
the line voltage is 250 Vrms and the line current is
20 Arms. In such a situation, the stated line voltage and
current do not determine the appropriate PulseRateE
1,2
setting. To achieve full-scale readings in the instanta-
neous voltage and current registers, a 250 mV, DC-lev-
el signal is applied to the channel inputs.
As in example #1, the voltage and current channel gains
are 10x, and the voltage level at the channel inputs will
be 150 mV rms when the levels on the power lines are
250 V rms and 20 A rms. In order to achieve
500 pulse-per-kW Hr per unit-energy, the
PulseRateE
1,2
Register setting is determined using the
following equation:
Therefor, the PulseRateE
1,2
Register is approximately
1.929 Hz. The PulseRateE
1,2
Register cannot be set to
a frequency of exactly 1.929 Hz. The closest setting is
0x00003E = 1.9375 Hz.
To improve the accuracy, either gain register can be
programmed to correct for the round-off error. This val-
ue would be calculated as
If (MCLK/K) is not equal to 4.096 MHz, the
PulseRateE
1,2
Register must be scaled by a correction
factor of:
Therefore if (MCLK/K) = 3.05856 MHz the value of
PulseRateE
1,2
Register is
5.5 Voltage Sag-detect Feature
Status bit VSAG in the Status Register, indicates a volt-
age sag occurred in the power line voltage. For a volt-
age sag condition to be identified, the absolute value of
the instantaneous voltage must be less than the voltage
sag level for more than half of the voltage sag duration
(see
Figure 7 ).
To activate Voltage Sag detect, a voltage sag level must
be specified in the Voltage Sag Level Register
(VSAG
Level ), and a voltage sag duration must be spec-
ified in the Voltage Sag Duration Register
(VSAG
Duration ). The voltage sag level is specified as the
average of the absolute instantaneous voltage. Voltage
sag duration is specified in terms of ADC cycles.
5.6 No Load Threshold
The CS5461A includes the LoadIntv (No Load Detec-
tion Interval) register and the LoadMin register to imple-
ment the no load threshold function. When the
accumulated energy measured within the time defined
by the LoadIntv register does not reach the value in the
LoadMin register, the pulse outputs will be disabled.
5.7 On-chip Temperature Sensor
The on-chip temperature sensor is designed to assist in
characterizing the measurement element over a desired
temperature range. Once a temperature characteriza-
tion is performed, the temperature sensor can then be
utilized to assist in compensating for temperature drift.
Temperature measurements are performed during con-
tinuous conversions and stored in the Temperature
Register. The Temperature Register (T) default is Cel-
sius scale (
o C). The Temperature Gain Register (T
gain
)
and Temperature Offset Register (T
off
) are constant val-
ues allowing for temperature scale conversions.
The temperature update rate is a function of the number
of ADC samples. With MCLK = 4.096 MHz and K = 1
the update rate is:
PulseRateE
1 2 ,
500pulses
kWHr
------------------------------
1Hr
3600s
----------------  1kW
1000W
-------------------
250mV
150mV
250V
-------------------  
 
-------------------------   250mV
150mV
20A
-------------------  
 
------------------------- 
=
Vgn or Ign
PulseRateE
1.929
----------------------------------- 1.00441

0x404830 = =
4.096MHz
(MCLK/K)
---------------------------- PulseRateE
1 2 ,

PulseRateE
1 2 ,
4.096
3.05856
--------------------- 1.929Hz

2.583Hz

=
Level
Duration
Figure 7. Voltage Sag Detect
2240 samples
(MCLK/K)/1024
----------------------------------------- 0.56 sec =