Cirrus Logic CS8421 - Manual

Copyright  Cirrus Logic, Inc. 2012
(All Rights Reserved)
http://www.cirrus.com
32-bit, 192-kHz Asynchronous Sample Rate Converter
Features
 175 dB Dynamic Range
 –140 dB THD+N
 No Programming Required
 No External Master Clock Required
 Supports Sample Rates up to 211 kHz
 Input/Output Sample Rate Ratios of 7.5:1 to 1:8
 Master Clock Support for 128 x Fs, 256 x Fs,
384 x Fs, and 512 x Fs (Master Mode)
 16-, 20-, 24-, or 32-bit Data I/O
 32-bit Internal Signal Processing
 Dither Automatically Applied and Scaled to
Output Resolution
 Flexible 3-wire Serial Digital Audio Input and
Output Ports
 Master and Slave Modes for Both Input and
Output
 Bypass Mode
 Time Division Multiplexing (TDM) Mode
 Attenuates Clock Jitter
 Multiple Device Outputs are Phase Matched
 Linear Phase FIR Filter
 Automatic Soft Mute/Unmute
 +2.5 V Digital Supply (VD)
 +3.3 V or 5.0 V Digital Interface (VL)
 Space-saving 20-pin TSSOP and QFN
Packages
The CS8421 supports sample rates up to 211 kHz and
is available in 20-pin TSSOP and QFN packages in both
Commercial (-10° to +70°C) and Automotive (-40° to
+85°C and -40° to +105°C) grades. The CDB8421 Cus-
tomer Demonstration board is also available for device
evaluation and implementation suggestions. See
“Or-
dering Information” on page 35 for complete details.
Serial
Audio
Input
Time
Varying
Digital
Filters
BYPASS
Digital
PLL
Clock
Generator
ILRCK
ISCLK
SDIN
Sync Info
Data
Serial
Audio
Output
OLRCK
OSCLK
SDOUT
XTI XTO
SRC_UNLOCK
2.5 V (VD) GND
RST
Sync Info
Data
Data
Level Translators
TDM_IN
MS_SEL
SAIF
SAOF
Serial
Port
Mode
Decoder
Level Tr
anslat
or
s
L
evel Tra
n
sl
a
tors
MCLK_OUT
3.3 V or 5.0 V (VL)
JULY ‘12
DS641F6
CS8421