MSI P67A-G45 (B3) - Manual (Page 40)

En-30
MS-7673 Manboard
Intel Turbo Boost
Ths tem wll appear when you nstall a CPU wth Intel Turbo Boost technology. Ths
tem s used to enable/ dsable Intel Turbo Boost technology. It can scale processor
frequency hgher dynamcally when applcatons demand more performance and TDP
headroom exsts. It also can delver seamless power scalablty (Dynamcally scale up,
Speed-Step Down). It s the Intel newly technology wthn newly CPU.
OC Gene Button Operaton
Ths field s used to enable/ dsable OC Gene functon.
DRAM Frequency
Ths settng controls the frequency of memory.
Adjusted DRAM Frequency
It shows the adjusted DRAM frequency. Read-only.
DRAM Tmng Mode
Select whether DRAM tmng s controlled by the SPD (Seral Presence Detect) EE-
PROM on the DRAM module. Settng to [Auto] enables DRAM tmngs and the followng
“Advanced DRAM Configuraton” sub-menu to be determned by BIOS based on the
configuratons on the SPD. Selectng [Lnk] or [Unlnk] allows users to configure the
DRAM tmngs and the followng related “Advanced DRAM Configuraton” sub-menu
manually.
Advanced DRAM Configuraton
Press <Enter> to enter the sub-menu.
Command Rate2
Ths settng controls the DRAM command rate.
tCL
Ths controls the CAS latency, whch determnes the tmng delay (n clock cycles)
before SDRAM starts a read command after recevng t.
tRCD
When DRAM s refreshed, both rows and columns are addressed separately. Ths
setup tem allows you to determne the tmng of the transton from RAS (row ad-
dress strobe) to CAS (column address strobe). The less the clock cycles, the faster
the DRAM performance.
tRP
Ths settng controls the number of cycles for Row Address Strobe (RAS) to be
allowed to precharge. If nsufficent tme s allowed for the RAS to accumulate ts
charge before DRAM refresh, refreshng may be ncomplete and DRAM may fal
to retan data. Ths tem apples only when synchronous DRAM s nstalled n the
system.
tRAS
Ths settng determnes the tme RAS takes to read from and wrte to memory cell.
tRFC
Ths settng determnes the tme RFC takes to read from and wrte to a memory
cell.
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