Achronix Speedster22i HD1000 Development Kit User Guide - Manual (Page 21)

UG034, July 1, 2014 21
Connect the development PC
Configure the HD1000 and Run the Application
There are three sources currently supported for the FPGA bitstream:
1. JTAG download through BitPorter Pod of bitstream on the development PC
2. SPI Flash
3. A Secure Digital (MicroSD) card
Configuring the Board for the Appropriate Bitstream Source
The board is preconfigured to accept the bitstream from the JTAG interface. Table 1 shows
the shunt positions for J31 to enable the other modes.
Connecting the Development PC
1. Connect the Bitporter pod using the ribbon cable to the development board (J11).
2. Power up the board.
3. Connect the Bitporter pod using the USB port to the development PC.
Configuring the HD1000 and Running the Application
You can configure the FPGA using one of three modes:
1. JTAG
2. Serial
3. CPU
Use jumper J31 and a shunt to select the mode as shown in Table 1. Figure 8 shows the
sources for the bitstream for these modes.