Pb-dout8, Software references, 3 pb-dout8 registers – Kontron PB-DOUT8 User Manual

Page 32

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PB-DOUT8

Page 4 - 4

Software References

22 Oct 98

Man. ID 17984, Rev. Index 0110

4.3 PB-DOUT8 Registers

4.3.1

Interrupt Handling

The piggyback interrupt register (IRQ register) is located on offset $79. Each HS/LS
channel is controlled by its own “interrupt enable” flag, which can be turned on/off at any
time, whether an interrupt is pending or not. After reset, all interrupts are disabled auto-
matically.

The summarised “IRQ enabled” status of all single-channel interrupts is sent to a flag
(SI, “sum of interrupts”) in the interrupt status register, which permits a quick overview
on whether an interrupt is pending or not through the single channels. If an interrupt
request bit (SI bit) should be sent to the VMEbus, the “Master Interrupt Enable” bit (MIE
bit) is set. If the factor causing the interrupt request disappears by itself, for instance if a
low-side switch having undercurrent at switch on of an inductive load, the SI bit will clear
itself immediately. However, the interrupt request that was generated will stay active
independently of such error self-clearing. The interrupt to the VMEbus is cleared in the
IRQ service routine by clearing the MIE flag. After all errors have been handled in the
interrupt service routine, the MIE bit must be switched on again by the irg service routine
to re-enable the interrupts.

4.3.2

Assembly, Revision and ID Codes

Hardware Assembly and Revision Code

The hardware assembly code, which is made available after having completed the
installation of the piggyback, is stored on offset $7B. There is a difference between
TLE5224G and TLE5224G2 due to slightly different error behaviour.

The following hardware revision codes exist:

$00:

PB-DOUT8 Ind. 00 with TLE5224G assembled;

$01:

PB-DOUT8 Ind. 01 with TLE5224G assembled;

$02:

PB-DOUT8 Ind. 01 with TLE5224G2 assembled.

Writing to this register is possible. However, the written data are not used.

Software Revision Code

The software revision code is stored on offset $7D.The following software revision
codes exist:

$00:

Initial version;

$01:

Interrupts supported.

Writing to this register is possible. However, the written data are not used.

ID Code

The piggyback ID code §E3 is stored on offset $7F. Writing to this register is possible.
However, the written data are not used.

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