2 fru data update, E-keying, 1 pci express lane width – x4 or x1 – Kontron AM4020 IPMI Firmware User Manual

Page 42: 2 pci express reference clock, Fru data update, Pci express lane width – x4 or x1, Pci express reference clock, Ipmi firmware am4020

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IPMI Firmware

AM4020

Page 34

ID 1036-5671, Rev. 2.0

P R E L I M I N A R Y

6.2

FRU Data Update

Update of the FRU data can be done via regular IPMI FRU device commands. The correct FRU
data must be prepared at the factory.

7.

E-Keying

E-Keying has been defined in the AMC.0 R2.0 Specification to prevent module damage,
prevent malfunction, and verify bay connection compatibility. Therefore, the FRU data of an
AMC module contains PICMG-defined records which describe the module’s AMC
interoperability:

Module Current Requirements Record

Clock Configuration Record, for the PCI Express reference clock

AMC Point-to-point Record, describing module’s AMC port capabilities

The IPMI commands

Set AMC Port State and Get AMC Port State defined by the

AMC.0 specification are used by the carrier or MCH for either granting or rejecting the E-keys
(i.e. enabling or disabling of AMC ports during E-Keying).

Which AMC port connections are activated will be decided during E-keying. The information
which AMC port is enabled or not, can be directly read from the board’s E-Keying
configuration registers (IAKEY0 and IAKEY1) at addresses 0x298 / 0x299.

The DIP Switch SW2 can be used to forcibly disable some AMC ports if required. Please refer
to the AM4020 User Guide for details.

7.1

PCI Express Lane Width – x4 or x1

The AM4020 supports either two PCI-E x4 connections (default) or up to eight PCI-E x1
connections.

The required PCI Express lane width (x4 or x1) must configured using the

kpci uEFI Shell

command.

For further information, refer to the AM4020 uEFI BIOS User Guide, Chapter 6, uEFI Shell.

7.2

PCI Express Reference Clock

Both sides (Root Complex and Endpoint) of a PCI Express connection should be driven by a
common reference clock. The PCI Express reference clock may be generated locally by the
module or acquired from the AMC connector.

The AM4020 (PCI Express Root Complex) may act either as clock receiver or as clock
source. This is described by the Clock Configuration Record (for the PCI Express reference
clock) and defined by the “AMC.1 R2.0, PCI Express on AMC” specification.

The DIP Switch SW2 can be used to overwrite the clock configuration (clock receiver, clock
source, etc.) regardless of the E-keying results. Please refer to the AM4020 User Guide for de-
tails.

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