Pci express root port 0/1/2/3/4 – Kontron COMe-bIP2 User Manual

Page 114

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COMe-bIP2 / BIOS Operation

PCI Express Root Port 0/1/2/3/4

Feature

Options

Description

PCI Express Root Port

Disabled
Enabled

Control the PCI Express Root Port

ASPM Support

Disabled

L0s

L1
L0sL1

Auto

Automatically enable ASPM based on reported
capabilities and known issues

URR

Disabled

Enabled

Enable or Disable PCI Express Unsupported Request
Reporting

FER

Disabled

Enabled

Enable or Disable PCI Express Device Fatal Error

Reporting

NFER

Disabled

Enabled

Enable or Disable PCI Express Device Non-Fatal Error
Reporting

CER

Disabled

Enabled

Enable or Disable PCI Express Device Correctable Error

Reporting

CTO

Disabled

Enabled

Enable or Disable PCI Express Completion Timer Timeout

SEFE

Disabled

Enabled

Enable or Disable Root PCI Express System Error on

Fatal Error

SENFE

Disabled

Enabled

Enable or Disable Root PCI Express System Error on Non-
Fatal Error

SECE

Disabled

Enabled

Enable or Disable Root PCI Express System Error on

Correctable Error

PME SCI

Disabled
Enabled

Enable or Disable PCI Express PME SCI

Hot Plug

Disabled

Enabled

Enable or Disable PCI Express Hot Plug

PCIe Speed

Auto
Gen1

Gen2

Configure PCIe Speed

Extra Bus Reserved

0

Extra Bus Reserved (0-7) for bridges behind this Root
Bridge

Reserved Memory

10

Reserved Memory (1-20 MB) Range for this Root Bridge

Prefetchable Memory

10

Prefetchable Memory (1-20 MB) Range for this Root

Bridge

Reserved I/O

4

Reserved I/O (4k/8k(12k/16k/20k) Range for this Root
Bridge

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