Kontron CP3-BP8-M - Manual (Page 5)

CPCI Backplane PD04: CP3-BP8-M
RID 24229 PD04, Rev. 01 © 2002 PEP Modular Computers GmbH Page 5
4. Signalling Environment
4.1 V(I/O) Setting
The backplane provides a block of three high-current terminals (designated as V(I/O)) for con-
necting V(I/O) to either the +5V or +3.3V power supply. V(I/O) must be connected either to the
+5V or the +3.3V input power. It is the responsibility of the system integrator to ensure that the
required signalling voltage is implemented and that the backplane P1 connector coding corre-
sponds to the implemented signalling voltage.
4.2 P1 Connector Coding for V(I/O)
The CompactPCI Specification foresees coding of the P1 connector to correspond to the sig-
nalling environment of the PCI bus. For this reason, only boards with universal or the corre-
sponding coding can be physically inserted into the backplane. PEP’s factory default setting
for V(I/O) is +5V and male, 1567 code, brilliant blue coding keys are used.
Warning!
Using both 3.3V and 5V boards within the same system may result in
damage to your equipment. Please note that the presence of only one
5V board determines a 5V signalling environment. The default setting
is 5V.
Warning!
Using boards with an inadequate signalling voltage may result in dam-
age to your equipment. Therefore, when changing the signalling envi-
ronment from 5V to 3.3V or vice versa, it is mandatory that proper
coding keys are used (refer to chapter 3 of the CPCI Backplane Man-
ual, ID 24229, for details).