Cypress enCoRe CY7C64215 User Manual

Encore™ iii full speed usb controller, Features, Block diagram

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CY7C64215

enCoRe™ III Full Speed USB Controller

Cypress Semiconductor Corporation

198 Champion Court

San Jose

,

CA 95134-1709

408-943-2600

Document 38-08036 Rev. *C

Revised December 08, 2008

Features

Powerful Harvard Architecture Processor

M8C Processor Speeds to 24 MHz

Two 8x8 Multiply, 32-bit Accumulate

3.0V to 5.25V Operating Voltage

USB 2.0 USB-IF certified. TID# 40000110

Operating Temperature Range: 0°C to +70°C

Advanced Peripherals (enCoRe™ III Blocks)

6 Analog enCoRe III Blocks provide:
• Up to 14-bit Incremental and Delta-Sigma ADCs

Programmable Threshold Comparator

4 Digital enCoRe III Blocks provide:
• 8-bit and 16-bit PWMs, timers and counters
• I

2

C Master

• SPI Master or Slave
• Full Duplex UART
• CYFISNP and CYFISPI modules to talk to Cypress CYFI

radio

Complex Peripherals by Combining Blocks

Full-Speed USB (12 Mbps)

Four Unidirectional Endpoints

One Bidirectional Control Endpoint

Dedicated 256 Byte Buffer

No External Crystal Required

Operational at 3.0V – 3.6V or 4.35V – 5.25V

Flexible On-Chip Memory

16K Flash Program Storage 50,000 Erase/Write Cycles

1K SRAM Data Storage

In-System Serial Programming (ISSP)

Partial Flash Updates

Flexible Protection Modes

EEPROM Emulation in Flash

Programmable Pin Configurations

25-mA Sink on all GPIO

Pull up, Pull down, High- Z, Strong, or Open Drain Drive
Modes on all GPIO

Configurable Interrupt on all GPIO

Precision, Programmable Clocking

Internal ±4% 24 and 48 MHz Oscillator

Internal Oscillator for Watchdog and Sleep

0.25% Accuracy for USB with no External Components

Additional System Resources

I

2

C

™ Slave, Master, and Multi-Master to 400 kHz

Watchdog and Sleep Timers

User-Configurable Low Voltage Detection

Integrated Supervisory Circuit

On-Chip Precision Voltage Reference

Complete Development Tools

Free Development Software (PSoC

®

Designer

™)

Full-Featured, In-Circuit Emulator and Programmer

Full Speed Emulation

Complex Breakpoint Structure

128K Bytes Trace Memory

enCoRe III Core

Block Diagram

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