Cisco 1600 - Manual (Page 4)

Cisco 1605
Figure 5 Cisco 1605R Rear Panel
Block Diagram
Figure 6 represents the basic block diagram of the 1600 router.
Figure 6 Basic Block Diagram of the 1600 Router
The basic characteristics and functions of each block in this platform can be summarized as:
ProcessorThe processor used in the 160x Series is the Motorola 68360 Complex Instruction Set
Computer (CISC). The main job of the processor is to load instructions defined in Cisco IOS®
software from PCMCIA Flash or from RAM (for the R models) and execute them, which basically
involves some manipulation of data. The M68360 is an embedded controller, and has a 32−bit
address, a 32−bit data bus, a 33 MHz internal clock, and a built−in Serial Communication Channels
(SCC).
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MemoryThis is discussed in more detail in the Memory Details section.
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BusesBuses are used by the CPU to access various components of the system and transfer
instructions and data to or from specified memory addresses.
CPU Bus is for high speed operations, with direct processor access. It has a 32−bit address
and 32−bit data at 33 MHz. These include access to dynamic RAM (DRAM), Boot ROM,
Non−Volatile RAM (NVRAM), PCMCIA Flash, and WIC.
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Input/Output (I/O) Bus allows the M68360 to individually control other devices through the
SCCs. This includes Universal Asynchronous Receiver/Transmitter (UART), the Ethernet
controller, and the WAN port interface.
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Cisco − Cisco 1600 Series Router Architecture