Cypress CY62157EV18 User Manual

Features, Functional description, Product portfolio

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Cypress Semiconductor Corporation

198 Champion Court

San Jose

,

CA 95134-1709

408-943-2600

Document #: 38-05490 Rev. *D

Revised March 30, 2007

CY62157EV18 MoBL

®

8-Mbit (512K x 16) Static RAM

Features

• Very high speed: 55 ns
• Wide voltage range: 1.65V–2.25V
• Pin Compatible with CY62157DV18 and CY62157DV20
• Ultra low standby power

— Typical Standby current: 2

µA

— Maximum Standby current: 8

µA

• Ultra low active power

— Typical active current: 1.8 mA @ f = 1 MHz

• Easy memory expansion with CE

1

, CE

2

and OE features

• Automatic power down when deselected
• CMOS for optimum speed and power
• Available in Pb-free 48-ball VFBGA package

Functional Description

[1]

The CY62157EV18 is a high performance CMOS static RAM
organized as 512K words by 16 bits. This device features
advanced circuit design to provide ultra low active current.
This is ideal for providing More Battery Life™ (MoBL

®

) in

portable applications such as cellular telephones. The device
also has an automatic power down feature that significantly
reduces power consumption when addresses are not toggling.
The device can also be put into standby mode when

deselected (CE

1

HIGH or CE

2

LOW or both BHE and BLE are

HIGH). The input and output pins (IO

0

through IO

15

) are

placed in a high impedance state when:

• Deselected (CE

1

HIGH or CE

2

LOW)

• Outputs are disabled (OE HIGH)
• Both Byte High Enable and Byte Low Enable are disabled

(BHE, BLE HIGH) or

• Write operation is active (CE

1

LOW, CE

2

HIGH and WE

LOW).

Write to the device by taking Chip Enables (CE

1

LOW and CE

2

HIGH) and Write Enable (WE) input LOW. If Byte Low Enable
(BLE) is LOW, then data from IO pins (IO

0

through IO

7

), is

written into the location specified on the address pins (A

0

through A

18

). If Byte High Enable (BHE) is LOW, then data

from IO pins (IO

8

through IO

15

) is written into the location

specified on the address pins (A

0

through A

18

).

Read from the device by taking Chip Enables (CE

1

LOW and

CE

2

HIGH) and Output Enable (OE) LOW while forcing the

Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins appear on IO

0

to IO

7

. If Byte High Enable (BHE) is LOW,

then data from memory appears on IO

8

to IO

15

. See the

“Truth

Table” on page 9

for a complete description of read and write

modes.

Product Portfolio

Product

V

CC

Range (V)

Speed

(ns)

Power Dissipation

Operating I

CC

, (mA)

Standby, I

SB2

(

µA)

f = 1MHz

f = f

max

Min

Typ

[2]

Max

Typ

[2]

Max

Typ

[2]

Max

Typ

[2]

Max

CY62157EV18

1.65

1.8

2.25

55

1.8

3

18

25

2

8

Notes

1. For best practice recommendations, refer to the Cypress application note “System Design Guidelines” located at

http://www.cypress.com.

2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V

CC

= V

CC(typ)

, T

A

= 25°C.

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