Maxim Integrated Ultra-High-Speed Flash Microcontroller - Manual (Page 123)

11-3
SECTION 11: PROGRAMMABLE TIMERS
The ultra-high-speed microcontroller incorporates three 16-bit programmable timers and has a watchdog timer with a programmable
interval. Because the watchdog timer is significantly different from the other timers, it is described separately. The 16-bit timers are
referred to as timers.
The three timers offer the same controls and I/O functions that were available in the 80C32. As mentioned, the actual timing of these func-
tions is user selectable to be compatible with the instruction cycle of the older generation of 8051 family (12 clocks per tick) or the new
generation (1 clock per tick). The timing for each of the three timers can be selected independently and can be changed dynamically.
In most modes, the timers can be used as either counters of external events or timers. When functioning as a counter, 1 to 0 transi-
tions on a port pin are monitored and counted. When functioning as timers, they effectively count oscillator or system clock cycles. The
time base for the timer function is detailed later in this section. Because an input clock pulse must be sampled high for two system
clock cycles and low for two system clock cycles in order to be recognized, this sets the maximum sampling frequency on any timer
input at one-fourth of the main system clock frequency.
Since the ultra-high-speed microcontroller timers have a variety of features, the following lists summarize the capabilities:
Timer 0 Timer 1 Timer 2
13-bit timer/counter 13-bit timer/counter 16-bit timer/counter
16-bit timer/counter 16-bit timer/counter 16-bit timer with capture
8-bit timer w/ autoreload 8-bit timer w/ autoreload 1 6-bit autoreload timer/counter
Two 8-bit timer/counters External control pulse timer/counter 16-bit up/down autoreload
External control pulse timer/counter Baud-rate generator Timer/counter
Baud-rate generator
Timer output clock generator
16-Bit Timers
Timers 0 and 1 are nearly identical. Timer 2 has several additional features such as up/down counting, capture values, and an option-
al output pin that make it unique. Table 11-1 summarizes the SFR bits that control operation of timers 0, 1, and 2. Detailed bit descrip-
tions can be found in Section 4. After the table, timers 0 and 1 are described first, followed by a separate description for timer 2. As
mentioned above, the time base for each timer can be varied, which is discussed in more detail in the following pages.
Timer 0, Timer 1 Modes
Timers 0 and 1 both have three common operating modes. They are 13-bit timer/counter, 16-bit timer/counter, and 8-bit timer/counter
with autoreload. Timer 0 can additionally be configured to operate as two 8-bit timers. These four modes, controlled by the TMOD reg-
ister, are detailed in the following pages.
Mode 0
Mode 0 configures either timer 0 or timer 1 for operation as a 13-bit timer/counter. As shown in Figure 11-1, setting TMOD register bits
M1, M0 = 00b selects this operating mode for either timer 0 or timer 1.
When using timer 0, TL0 uses only bits 0 through 4. These bits serve as the 5 LSbs of the 13-bit timer. TH0 provides the 8 MSbs of the
13-bit timer. Bit 4 of TL0 is used as a ripple out to TH0 bit 0, thereby completely bypassing bits 5 through 7 of TL0. Once the timer is
started using the TR0 (TCON.4) timer enable, the timer counts as long as GATE (TMOD.3) is 0 or GATE is 1 and pin INT0 is 1. It counts
oscillator or system clock cycles if C/T (TMOD.2) is set to a logic 0 and 1 to 0 transitions on T0 (P3.4) if C/T is set to a 1. When the 13-
bit count reaches 1FFFh (all ones), the next count causes it to roll over to 0000h. The TF0 (TCON.5) flag is set and an interrupt occurs
if enabled. The upper 3 bits of TL0 are indeterminate.
Note that when used as a timer, the input clock selection can be affected by the clock divide bits (PMR.7-6), the TxM bit (in the CKCON
register), and the TxMH bit (in the CKMOD register). The time base selection is described in more detail later in this section.
Mode 0 operates identically when timer 1 is used. The same information applies to TL1 and TH1, which form the 13-bit register. TR1
(TCON.6), INT1 (P3.3), T1 (P3.5) and the relevant C/T (TMOD.6), and GATE (TMOD.7) bits have the same functions.
Ultra-High-Speed Flash
Microcontroller User’s Guide
Maxim Integrated