2 front-end and input stage, Front-end and input stage, Figure 3. input stage signal processing path – Maxim Integrated 78M6631 User Manual

Page 8

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78M6631 Firmware Description Document

UG_6631_078

8

Rev 2

At the end of each accumulation interval, these measurements are provided to the MPU for post-

processing. Alternate multiplexer cycles also gather measurements of the IC’s junction temperature for

additional compensation in the MPU. Post-processing functions handled by the MPU at the end of every

accumulation interval include:

Compensation for environmental variables

Calculation of apparent power, power factor, phase angle, and line frequency

Comparing of measurement outputs to configurable alarm thresholds

Scaling

and formatting of output measurement data

Updating of all output registers (data and alarm status)

2.2.2 Front-End and Input Stage

Figure 3 shows the ADC signal path and signal processing for the voltage and current input channels.

SINC

3

DECIMATOR

IA

CROSS-

POINT

∆Σ

MODULATOR

PRECISION

REFERENCE

IA_RAW

VA_RAW

IB_RAW

VA1

F

ADC

+250mv

ADC

X

X

X

X

VB_RAW

IA1

VA

IB

VB

IC

VC

IC_RAW

VC_RAW

IoffsA

VoffsA

Φ COMP

PCOMPA

TEMPERATURE

SENSOR

Temperature

Compensation

IgainA

+

VgainA

+

VB1

X

X

X

X

IB1

IoffsB

VoffsB

Φ COMP

PCOMPB

IgainB

+

VgainB

+

VC1

X

X

X

X

IC1

IoffsC

VoffsC

Φ COMP

IgainC

+

VgainC

+

PCOMPC

Φ COMP

Φ COMP

Φ COMP

Figure 3. Input Stage Signal Processing Path

The gray boxes are the gain calibration input registers. These registers can be modified by the user or by

the gain calibration routine for both voltage and current channels.

The voltage and current inputs channels are also temperature compensated. A compensation algorithm

based on the reading of an on-chip temperature sensor, corrects the gain in order to maintain the

accuracy across the temperature range.

The phase compensation block allows to digitally correct phase errors. These errors are usually

introduced by the voltage/current transformers or external filters. The phase error is calibrated by

introducing a time delay or a time advance, specified in the phase adjust registers.

The registers PCompA, PCompB, and PCompC can be modified by the user.

A configurable high-pass filter (HPF) in both voltage and current signal path removes any DC content

(offset) in the inputs.

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