Maxim Integrated 78M6610+PSU Hardware Design Guidelines - Manual (Page 12)

78M6610+PSU Hardware Design Guidelines AN_6610_107
12 Rev 0
4.3 Reset Circuitry
The 78M6610+PSU employs an active low Reset input pin. Figure 8 shows the external circuit
configuration using a pushbutton switch to generate the reset signal. If an external reset is not required,
connect the Reset pin to V
3P3
. An external reset is typically only used during the development phase of a
project. The RESET pin can be tied high for the production version of the PCB.
GNDD
V
3P3D
RESET
1nF
10K Ω
V
3P3
GND
Manual
Reset
Switch
GNDD
V
3P3D
RESET
V
3P3
GND 78M6610+PSU 78M6610+PSU
a) RESET External Connection Example b) Unused RESET Connection Example
Figure 8: Reset Pin Connections