Leds, Jumpers, Microcode – Cisco (VIP6-80) User Manual

Page 6: Rom monitor, Table 3

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6

Versatile Interface Processor (VIP6-80) Installation and Configuration Guide

OL-5078-01

LEDs

The VIP6-80 has LEDs; however, they are not be visible once the VIP is installed in the Cisco 7500 or
the Cisco 7000 router. The port adapters that fit into the VIP do have visible LEDs. Refer to the
Installation and Configuration Guide for your specific port adapter for more information.

Jumpers

There are no user-configurable jumpers on the VIP6-80.

Microcode

The Cisco 7500 and Cisco 7000 series routers support downloadable microcode, which enables you to
upgrade microcode versions by downloading new microcode images, storing them in system Flash
memory, and instructing the system to load its image from Flash memory. You can store multiple images
for an interface type, such as the VIP6-80, and, with a configuration command, instruct the system to
load any one of them or the default microcode image. Although multiple microcode versions for a
specific interface type can be stored concurrently in Flash memory, only one image can load at startup.

The show controllers cbus command displays the currently loaded and running microcode version for
each interface processor and the VIP6-80. The show startup-config EXEC command shows the current
system instructions for loading microcode at startup.

Software and interface processor microcode images are bundled to work together. Overriding the bundle
can result in system incompatibilities. We recommend that you use the microcode included in the
software bundle. For information on upgrading software and microcode in Cisco 7500 series routers, see
the Cisco IOS Software Configuration Fundamentals Configuration Guides for the mainline software
release that you are running.

ROM Monitor

The VIP6-80 read-only memory (ROM) monitor, known as Rommon, is firmware. It runs a brief set of
system diagnostics, initializes the VIP6-80 hardware, and downloads a copy of the Cisco IOS image. The
ROM monitor loads the Cisco IOS image from Flash memory or from a TFTP server. While multiple
Cisco IOS images can be stored in RSP Flash memory, just one can be loaded at system startup.

Table 3

Memory Components

Type

Size

Description

Location
(See

Figure 1

.)

SDRAM DIMMs

1

(program or CPU
memory)

1.

8-bit error correction code (ECC), rather than byte parity, for single error-bit correction and double error-bit detection

64 (default), 128, or 256 MB

100-MHz synchronous dynamic random-access
memory (SDRAM) as CPU memory contained on
dual in-line memory modules (DIMMs)

U1

SDRAM DIMMs

1

(packet memory)

64 MB (default)

100-MHz synchronous dynamic random-access
memory (SDRAM) as packet memory contained on
dual in-line memory modules (DIMMs)

U5

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