Campbell Hausfeld SDM-CD16AC - Manual (Page 14)

SDM-CD16AC 16 Channel AC/DC Controller
The number of SDM-CD16ACs to be addressed is defined by the Reps
(repetitions) parameter. Each Rep will sequentially address (00, 01, 02,...32,
33) SDM-CD16ACs starting with the address specified in parameter 2
(Instruction 29 parameter 3).
For each Rep, the 16 ports of the addressed SDM-CD16AC are set according
to 16 sequential Input Locations starting at the Input Location specified in
parameter 3 (Instruction 29 parameter 5). Any non-zero value stored in an
input location activates the associated SDM-CD16AC port. A value of zero
(0) deactivates the port For example, assuming 2 Reps and a starting Input
Location of 33, OUTPUT 1 through 16 of the first SDM-CD16AC are set
according to Input Locations 33 through 48, and OUTPUT 1 through 16 of the
second SDM-CD16AC are set according to Input Locations 49 through 64.
For Instruction 29, the Device (parameter 2) specifies what type of
synchronously addressed peripheral is to be addressed. The Device code for
an SDM-CD16AC is 2.
For Instruction 29 only (CR7), the Card parameter 4 specifies which 725
Excitation Card is being used for the Control Port signals. The Reps parameter
does not advance beyond the specified Card, requiring another Instruction 29
for each 725 Excitation Card used.
7. Theory of Operation
The SDM-CD16AC is a synchronously addressed peripheral. C2 and C3,
driven high by the datalogger, initiate a cycle. While holding C3 high, the
datalogger drives C2 as a clock line and C1 as a serial data line. The
datalogger shifts out a data bit on C1 (LSB first) on the falling edge of the C2
clock. The SDM-CD16AC shifts in the C1 data bit on the rising edge of the
C2 clock.
The first 8 bits clocked out represent the SDM-CD16AC address. If the
address matches the SDM-CD16AC's address, the SDM-CD16AC is enabled.
If enabled, the next 16 bits are shifted into the SDM-CD16AC, each bit
controlling one port, the first of which controls OUTPUT1.
When the 16 control bits are clocked in, C2 is held high while C3 is pulsed low
then high to latch the control bits. The datalogger then lowers both C3 and C2
to complete the cycle.
8. Program Examples
8.1 CRBasic Example
In the following CR1000 program example, a counter is used to fill an array
called Src( ) that will control two SDM-CD16ACs.
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