Avalue EPI-LX800 User Manual

Page 106

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EPI-LX800 Series

106 EPI-LX800 Series User’s Manual

40.3 S4 POST Codes

Code (hex)

Name

Description

5A

Early Chipset Init

Early Initialized the super IO. Reset Video controller. Keyboard

controller init. Test the Keyboard Initilized the mouse

5B

Cmos Check

Check Cmos Circuitry and reset CMOS

5C

Chipset default Prog

Program the chipset registers with CMOS values. Init onboard

clock generator

5D

Identify the CPU

Check the CPU ID and init L1/L2 cache Initialize first 120 interrupt

vectors with SPURIOUS_INT_HDLR and INT 00h-1Fh according

to INT_TBL. First step initialize if single CPU Onboard. Re-init KB

If support HPM, HPM get initialized Here.

5E

Setup Interrupt Vector

Table

Initialize first 120 interrupt vectors with SPURIOUS_INT_HDLR

and INT 00h-1Fh according to INT_TBL. First step initialize if

single CPU Onboard. Re-init KB If support HPM, HPM get

initialized here.

5F

Test CMOS Interface

and Battery status

Verifies CMOS is working correctly, detects bad battery. If failed,

load CMOS defaults and load into chipset.

60

KBC final Init

Final Initial KBC and setup BIOS data area

61

Initialize Video Interface Read CMOS location 14h to find out type of video in use. Detect

and Initialize Video Adapter.

62

Video memory test

Test video memory, write sign-on Test video memory, write

sign-on message to screen. Setup shadow RAM - Enable

shadow according to Setup.

63

Setup PS2 mouse and

test DMA

Setup PS2 Mouse and reset KB Test DMA channel 0

64

Test 8259

Test 8259 channel 1 and mask IRQ 9

65

Init Boot Device

Detect if mouse is present, initialize mouse, install interrupt

vectors. Special treatment to PS2 Mouse port ACPI sub-system

initializing Initialize cache controller.

66

Install Boot Devices

Enter setup check and auto-configuration check up Initialize

floppy disk drive controller and any drives. Install FDD and setup

BIOS data area Parameters Initialize hard drive controller and

any drives. IDE device detection and install

67

Cache Init

Cache init and USB init

68

PM init

PM initialization

69

PM final Init and issue

SMI

Final init Before resume

FF Full

on

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