Altera Arria V GX Starter Board - Manual (Page 10)

2–2 Chapter 2: Board Components
Board Overview
Arria V GX Starter Board November 2013 Altera Corporation
Reference Manual
Board Overview
This section provides an overview of the Arria V GX starter board, including an
annotated board image and component descriptions.
Figure 2–1 shows an overview
of the board features.
Table 2–1 describes the components and lists their corresponding board references.
Figure 2–1. Overview of the Arria V GX Starter Board Features
Clock Input
SMA
Connector
(J7, J8)
Max V Reset
Push Button (S3)
General User
Push Buttons
(PB1, PB2)
Flash x32
Memory
(U12, U13)
Board Settings
DIP Switch
(SW4)
PCI Express
Edge Connector (J1)
DDR3 x32
(U10,U11)
DC Input
Jack (J4)
Character
LCD (J16)
CPU Reset
Push Button (S4)
Power
Switch
(SW1)
User DIP
Switch (SW2)
User LEDs
(D20-D23)
MAX V CPLD
EPM2210 System
Controller (U15)
Clock Output
SMA Connector
(J12) HSMC Port A (J13)
Configuration Done,
Load, and Error
LEDs (D10-D12)
Program Load,
Program Select
Push Buttons
(S1, S2)
Program Select
LEDs (D24-D26)
Transceiver RX
SMA Connector
(J2, J3)
Transceiver TX
SMA Connector
(J4, J5)
USB Type-B
Connector (J14)
HDMI Video
Port (J10)
SDI Video Port
(J11, J12)
Gigabit Ethernet
Port (J19)
JTAG Chain
Header (J9)
Fan Power
Header (J18)
SSRAM x36
Memory
(U14)
PCI Express
Mode DIP Switch
(SW1)
Arria V GX
FPGA (U1)
Table 2–1. Arria V GX Starter Board Components (Part 1 of 3)
Board Reference Type Description
Featured Devices
U1 FPGA Arria V GX, 5AGXFB3H4F35C4N, 1152-pin FBGA.
U15 CPLD MAX V CPLD, 5M2210ZF256C4N , 256-pin FBGA.
Configuration, Status, and Setup Elements
J9 JTAG chain header
Provides access to the JTAG chain and disables the on-board
USB-Blaster II when using an external USB-Blaster cable.
D6, D7 JTAG LEDs
Indicate transmit or receive activity of the JTAG chain. The TX and RX
LEDs would flicker if the link is in use and active.
SW2 JTAG chain control DIP switch Remove or include devices in the active JTAG chain.