Zilog Z80380 User Manual
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ANUAL
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5.5.2 16-Bit and 32-Bit Load, Exchange,
SWAP, and PUSH/POP Group
This group of load, exchange, and PUSH/POP instructions
(Table 5-4) allows one or two words of data (two bytes
equal one word) to be transferred between registers and
memory.
The exchange instructions (Table 5-5) allow for switching
between the primary and alternate register files, exchang-
ing the contents of two register files, exchanging the
contents of an addressing register with the top word on the
stack. For possible combinations of the word exchange
instructions, refer to Table 5-5. The 16-bit and 32-bit loads
include transfer between registers and memory and imme-
diate loads of registers or memory. The Push and Pop
stack instructions are also included in this group. None of
these instructions affect the CPU flags, except for EX AF,
AF’.
Table 5-6 has the supported source/destination combina-
tion for the 16-bit and 32-bit load instructions. The transfer
size, 16-bit or 32-bit, is determined by the status of LW bit
in SR, or by DDIR Decoder Directives.
PUSH/POP instructions are used to save/restore the con-
tents of a register onto the stack. It can be used to
exchange data between procedures, save the current
register file on context switching, or manipulate data on the
stack, such as return addresses. Supported sources are
listed in Table 5-7.
Swap instructions allows swapping of the contents of the
Word wide register (BC, DE, HL, IX, or IY) with its Extended
portion. These instructions are useful to manipulate the
upper word of the register to be set in Word mode. For
example, when doing data accesses, other than
00000000H-0000FFFFH address range, use this instruc-
tion to set “data frame” addresses.
This group of instructions is affected by the status of the LW
bit in SR (Select Register), and Decoder Directives which
specifies the operation mode in Word or Long Word.
Table 5-4. 16-Bit and 32-Bit Load, Exchange, PUSH/POP Group Instructions
Instruction Name
Format
Note
Exchange Word/Long Word Registers
EX dst,src
See Table 5-5
Exchange Byte/Word Registers with Alternate Bank
EXX
Exchange Register Pair with Alternate Bank
EX RR,RR’
RR = AF, BC, DE, or HL
Exchange Index Register with Alternate Bank
EXXX
EXXY
Exchange All Registers with Alternate Bank
EXALL
Load Word/Long Word Registers
LD dst,src
See Table 5-6
LDW dst,src
See Table 5-6
POP
POP dst
See Table 5-7
PUSH
PUSH src
See Table 5-7
Swap Contents of D31-D16 and D15-D0
SWAP dst
dst = BC, DE, HL, IX, or IY
Table 5-5. Supported Source and Destination
Combination for 16-Bit and 32-Bit
Exchange Instructions
Source
Destination
BC
DE
HL
IX
IY
BC
√
√
√
√
DE
√
√
√
HL
√
√
IX
√
(SP)
√
√
√
Note:
√
are supported combinations. The exchange in-
structions which designate IY register as destination are
covered by the other combinations. These Exchange
Word instructions are affected by Long Word mode.