Artesyn COMX-P4080-2G-ENP2 Installation and Use (August 2014) - Manual (Page 52)

Functional Description
COMX-P4080-2G-ENP2 Installation and Use (6806800P63B) 52
4.18.2 I2C Device EEPROM
I2C device consists of two I2C EEPROMs, AT24C02C and AT24C512C. These EEPROMs are
located on I2C1; one is for ID EEPROM (U30, AT24C02C, storing board serial number, MAC
address and so on.) and the other is for Processor EEPROM (U2001, AT24C512C, storing
processor ID and so on).The I2C addresses of these EEPROMs are 0xAE and 0xA8.
The EEPROM provides 2048 bits of serial electrically erasable and programmable read-only
memory (EEPROM) organized as 256 words of 8 bits each.
AT24C02 support SEQUENTIAL READ and page write.
Sequential reads are initiated by either a current address read or a random address read. After
micro-controller receives a data word, it responds with an acknowledge. As long as the
EEPROM receives an acknowledge, it will continue to increment the data word address and
serially clock out sequential data words. When the memory address limit is reached, the data
word address will roll over and the sequential read will continue.
AT24C02's 32K EEPROM was internally organized with 32 pages of 8 bytes each. A page write
is initiated the same as a byte write, but the micro-controller does not send a stop condition
after the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the
first data word, the micro-controller can transmit up to seven more data words.
4.18.3 I2C Device WDT
The WDT M41T65Q is located on I2C1, U2101 and the device address is 0xD0.
U-boot has the following considerations:
 By default, u-boot should mask event output and disable WDT.
 U-boot should provide commands for enabling WDT and disabling WDT.
4.18.4 I2C Device RTC
The RTC M41S62L is located on I2C2, U2100 and the device address is 0xD0.