1 sampling clock, Sampling clock – Sundance SMT8121 User Manual

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Samples are sent from the ADC to the DAC via SDB connection. Two 32-bits SDBs
running at 1/8 of the sampling frequency are used to transport the samples of each
channel.
A snapshot of the samples captured by the ADC is also sent to the DSP via two
comport connections. The DSP computes the FFT of the data and sends the raw
data and the result of the FFT to host to be displayed.

6.1 Sampling clock

For the system to work without loss of sample the sampling clocks of the ADC and
the DAC need to be the same.
There are two ways to supply the sampling clock to the ADC and the DAC. You can
either use the SMT391 on-board VCO or use an external signal generator.

1. Use the SMT391 on-board VCO

The SMT391 is configured to use its on-board VCO. The SMT381 is configured to
use external RF clock source.
The sampling clock generated on the SMT391 is provided to the SMT381 by
connecting SMT391-J8 to SMT381-J5.
The range of frequencies available goes from 600Msps to 1Gsps.

2. Use external clock

Both SMT391 and SMT381 are configured to use external sampling clock. An
external signal generator is used to generate the sampling clock.

Application Note SMT8121

Page 13 of 26

Last Edited: 19/02/2009 16:32:00

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