Verilink SCC 2130 (880-503282-001) Product Manual - Manual (Page 43)

Configuration
Verilink SCC 2130 User Manual 3-23
45 — Not applicable (The SCC does not support storing and restoring
module configurations as the older NCC node controller modules did)
46 — Not applicable (The SCC does not support storing and restoring
module configurations as the older NCC node controller modules did)
47 SCC 2130
TAC 2010
TAC 2130
Network LBO = 0 dB; Typical value, use when a T1 installed by a local
Bell carrier is terminated in a “smart jack”, (network termination
device) or the first repeater is 2000 to 3000 feet away
48 SCC 2130
TAC 2010
TAC 2130
Network LBO = 7.5 dB; Attenuates transmit signal by 7.5db, USE ONLY
IF NO SMART JACK IS PRESENT, implies that the first active device
(repeater, T3 mux, far CSU) is 1000 to 2000 feet away
49 SCC 2130
TAC 2010
TAC 2130
Network LBO = 15 dB; Attenuates transmit signal by 15db, USE ONLY
IF NO SMART JACK IS PRESENT , implies that the first active device
(repeater, T3 mux, far CSU) is 0 to 1000 feet away
50 TAC 2010 Selects DSX-1 Equipment cable length of 0-132 ft
51 TAC 2010 Selects DSX-1 Equipment cable length of 133-265 ft
52 TAC 2010 Selects DSX-1 Equipment cable length of 266-398 ft
53 TAC 2010 Selects DSX-1 Equipment cable length of 399-532 ft
54 TAC 2010 Selects DSX-1 Equipment cable length of 533-655 ft
55 TAC 2010 Set data bus to NONE (CSU mode) [default]
56 TAC 2010
DIU 2140
Set data bus to A (Mux mode)
57 TAC 2010
DIU 2140
Set data bus to B (Mux mode)
58 TAC 2010
DIU 2140
Set data bus to C (Mux mode)
59 SCC 2130
TAC 2010
TAC 2130
Send in-band CSU loop-up code to far-end CSU, this should cause the
far end CSU to enter a Line Loopback condition
60 SCC 2130
TAC 2010
TAC 2130
Send framed QRSS to far end
61 SCC 2130
TAC 2010
TAC 2130
Stop QRSS pattern and send inband CSU loop-down code to far end
62 DIU 2140 Use timeslot 24 on the assigned CSU, set all 5 data ports to 9.6 kbit/s
63 DIU 2140 Selects split timing (RX clock ~ TX clock); typical value
64 DIU 2140 Selects single source timing (RX clock = TX clock);
Code Applies to Description