ATL Telecom AM2048 - Manual (Page 12)

ATL TELECOM USER GUIDE
AM2048A
21
The internal clock is generated at the Master, both terminals lock to this clock and return the
clock to the AM2048s. An elastic store in the AM2048 buffers the data.
Using the “Configuration > User Port” Menu:
1
At the Master, select the ‘Internal’ timing option.
2 Using F8, cycle to the NTU user port, select the ‘Internal’ timing option.
Press ‘Return’ to enter the changes.
4.9.1.3 G.703 to X.21/V.35 Internal Timing
Slave terminals are connected to the digital section at both ends, a clock inside the Master
then becomes the reference clock for the entire system.
The internal clock is generated at the ELU, both terminals lock to this clock and return the
clock to the AM2048s. An elastic store in the AM2048 buffers the data.
Using the “Configuration > User Port” Menu:
At the Master, select the ‘Internal’ timing option (There is nothing to set at the Slave).
Press ‘Return’ to enter the changes.
4.9.1.4 X.21/V.35 DCE to X.21/V.35 DCE
The terminals connected to the digital section at both ends are DTEs, a clock inside the ELU
then becomes the reference clock for the entire system.
AM2048
Slave
AM2048
Master
Terminal Terminal
B
B
G.703 G.703 V.35/X.21 V.35/X.21
DTE DCE
4
20 ATL TELECOM USER GUIDE
AM2048A
4.9.1.1 G.703 to G.703 Transparent Timing
In this configuration, the terminals are the source of timing. One of the connected terminals
may act as a master, the other as a slave. However, both terminals could operate
independently or pleisiochronously.
Clocks T1 and T2 are independent of one another and are transported independently through
the DSL system.
Using the “Configuration > User Port” Menu:
1
At the ELU, select the ‘Transparent’ timing option.
2 Using F8, cycle to the NTU user port, select the ‘Transparent’ timing option.
Press ‘Return’ to enter the changes.
Note: This is the default timing option for G.703.
4.9.1.2 G.703 to G.703 Internal Timing
Slave terminals are connected to the digital section at both ends, the clock source inside the
Master then becomes the reference clock for the entire system.
G.703
AM2048
Slave
AM2048
Master
Terminal Terminal
G.703 G.703 G.703
B
B
G.703
AM2048
Slave
AM2048
Master
Terminal Terminal
G.703 G.703 G.703
T1
T2