Epson SED1278F/D - Manual

1
SED1278F/D
Dot Matrix LCD Controller Driver
SEIKO EPSON CORPORATION
PF282-07
1/8, 1/11 or 1/16 Duty Dot Matrix Drive
Built-in Character Generator ROM and RAM
( )
Maximum Simultaneous Display of 80 Characters
(With extension LCD driver)
DESCRIPTION
The SED1278F/D is a dot matrix LCD controller/driver which is dedicated to character display. It is capable of
displaying up to 80 characters under 4-bit/8-bit MPU control.
The built-in character generator ROM has an extended capacity of 240 different characters, each being generated
in a 5 10 dots font compatible with a 1/11 duty. In addition, the SED1278F/D contains 64 bytes of character
generator RAM in which the user can store 8 different characters, each consisting of 5 8 dots. These memory
features offer high flexibility in character display.
The guaranteed minimum LCD driving voltage is 3V, and this makes the SED1278F/D suitable for driving low
voltage LCDs.
FEATURES
Display RAM ............................... 80 bytes (80 characters)
Character generator ROM .......... 240 characters (Able to 256 characters)
Character generator RAM .......... 8 characters
Built-in CR oscillator, Built-in power-on reset circuit
Maximim display dimension ....... 40 characters 2 lines, 80 characters 1 line
(When accompanied with SED1181F
LA
/D
LA
, SED1681F
OA
/D
OA
)
1/8, 1/11 or 1/16 duty matirx drive (fixed by command)
2 flame AC wave-form drive
High-speed bus interface with 4-bit/8-bit MPU
Powerful display control instructions
Character .................................... 5 7 dots+Cursor line (5 8 dots also possible)
5 10 dots+Cursor line
6 Kinds of character font
Single power supply ................... 5V
±
10% (Logic)
Low LCD driving voltage ............ V
DD
-V
5
>
= 3.0V
Package ..................................... SED1278F: QFP5-80pin (plastic)
SED1278D: Die form (Al pad)
BLOCK DIAGRAM
ROM 240 characters
RAM 8 characters
Instruction Decoder
M P X
M P X
M P X
Display Data RAM
DD RAM
80 Bytes
Character
Generator
RAM
(CG RAM)
64 Bytes
Character
Generator
RAM
(CG RAM)
5 10 240 Byts
Instruction Register Refresh Address Counter Address
Counter ACC
Parallel/Serial
Data Converter
Shift Register
40 Bits
Latch Circuit
40 Bits
Segment Driving
Output Circuit
Common Driving
Output Circuit
Shift Register 16 Bits
Timing Generator
Oscillation
Circuit
DB0
DB7
8
8
8
5 5
8
5
7
7
Cursor/
Brink Control
Data Register
I/O Buffer
I/O Control
~
E
R/W
RS
V
DD
V
SS
V1
V2
V3
V4
V5
OSC1 OSC2
XSCL
LP
FR
COM1
COM16
~~
SEG1
SEG40
D0
SED1278F/D