Document Outline

• New in this release
  • Other
    • Revision History
  • New circuit cards for CS 1000 Release 5
• How to get help
  • Getting help from the Nortel web site
  • Getting help over the telephone from a Nortel Solutions Center
  • Getting help from a specialist by using an Express Routing Code
  • Getting help through a Nortel distributor or reseller
• Overview
  • Contents
  • Line cards
  • Trunk cards
  • Installation
  • Operation
  • Serial Data Interface (SDI) cards
• Circuit card installation
  • Contents
  • Card slots - Large System
  • Circuit and installation
  • Precautions
  • Installing a circuit card
• Acceptance tests
  • Contents
  • Introduction
  • Conference cards
  • Digitone receiver cards
  • Line cards
  • Multifrequency sender cards
  • Multifrequency signaling cards
  • Network cards
  • Trunk cards
  • Tone and digit switch cards
• Option settings
  • Contents
  • Circuit card grid
  • NT1R20 Off-Premise Station card
  • NT5D12 Dual DTI/PRI (DDP) card
  • NT6D42 Ringing Generator DC
  • NT6D80 Multi-purpose Serial Data Link card
  • NT8D14 Universal Trunk card
  • NT8D15 E and M Trunk card
  • NT8D17 Conference/TDS card
  • NT8D21 Ringing Generator AC
  • NT8D22 System Monitor
    • NT8D22 jumper settings
  • NT8D41BA Quad Serial Data Interface Paddle Board
  • QPC43 Peripheral Signaling card
  • QPC71 E and M/DX Signaling and Paging Trunk cards
  • QPC414 Network card
  • QPC441 3-Port Extender cards
  • QPC559, QPC560 Loop Signaling Trunk cards
  • QPC528 CO/FX/WATS Trunk cards
  • QPC471 Clock Controller card
  • QPC525, QPC526, QPC527, QPC777 CO Trunk card
  • QPC550 Direct Inward Dial Trunk card
  • QPC551 Radio Paging Trunk card
  • QPC595 Digitone Receiver cards
  • QPC577, QPC596 Digitone Receiver daughterboards
  • QPC720 Primary Rate Interface card
  • QPC775 Clock Controller card
  • QPC841 4-Port Serial Data Interface card
• NT1R20 Off-Premise Station Analog Line card
  • Contents
  • Introduction
  • Physical description
  • Functional description
  • Electrical specifications
  • Operation
  • Connector pin assignments
  • Configuring the OPS analog line card
  • Application
• NT4N39AA CP Pentium IV Card
  • Contents
  • Introduction
  • Physical description
  • Functional description
  • Front panel connector pin assignments
• NT5D11 and NT5D14 Lineside T1 Interface cards
  • Contents
  • Introduction
  • Physical description
  • Functional description
  • Electrical specifications
  • Installation and configuration
  • Clocking Requirement
    • Connecting MGC DECT Clock Reference Cable
  • Man-Machine T1 maintenance interface software
  • Applications
• NT5D33 and NT5D34 Lineside E1 Interface cards
  • Contents
  • Introduction
  • Physical description
  • Functional description
  • Electrical specifications
  • Installation and Configuration
  • Installation
  • Clocking Requirement
    • Connecting MGC DECT Clock Reference Cable
  • Man-Machine E1 maintenance interface software
  • Applications
• NT5D60/80/81 CLASS Modem card (XCMC)
  • Contents
  • Introduction
  • Physical description
  • Functional description
  • Electrical specifications
  • Configuration
• NT5D97 Dual-port DTI2 PRI2 card
  • Contents
  • Introduction
  • Physical description
  • Functional description
  • Architecture
  • Operation
• NT5K02 Flexible Analog Line card
  • Contents
  • Introduction
  • Applications
• NT5K21 XMFC/MFE card
  • Contents
  • Introduction
  • MFC signaling
  • MFE signaling
  • Sender and receiver mode
  • Physical specifications
• NT6D70 SILC Line card
  • Contents
  • Introduction
  • Physical description
  • Functional description
• NT6D71 UILC line card
  • Contents
  • Introduction
  • Physical description
  • Functional description
• NT6D80 MSDL card
  • Contents
  • Introduction
  • Physical description
  • Functional description
  • Engineering guidelines
  • Installation
  • Maintenance
  • Replacing MSDL cards
  • Symptoms and actions
  • System disabled actions
• NT7D16 Data Access card
  • Content list
  • Introduction
  • Features
  • Controls and indicators
  • Dialing operations
  • Operating modes
  • Keyboard dialing
  • Hayes dialing
  • Specifications
  • System database requirements
  • Power supply
  • Installing the Data Access card
  • Port configuration
  • Cabling
  • Backplane pinout and signaling
  • Configuring the Data Access card
  • Connecting Apple Macintosh to the DAC
  • Upgrading systems
• NT8D02 and NTDK16 Digital Line cards
  • Contents
  • Introduction
  • Physical description
  • Functional description
  • Electrical specifications
  • Digital line interface specifications
  • Connector pin assignments
  • Configuration
• NT8D03 Analog Line card
  • Overview
• NT8D09 Analog Message Waiting Line card
  • Contents
  • Introduction
  • Physical description
  • Functional description
  • Connector pin assignments
  • Configuration
• NT8D14 Universal Trunk card
  • Contents
  • Introduction
  • Physical description
  • Functional description
  • Operation
  • Electrical specifications
  • Connector pin assignments
  • Configuration
  • Applications
• NT8D15 E and M Trunk card
  • Contents
  • Introduction
  • Physical description
  • Functional description
  • Operation
  • Electrical specifications
  • Connector pin assignments
  • Configuration
  • Applications
• NT8D41AA Serial Data Interface Paddle Board
  • Contents
  • Introduction
  • Physical description
  • Functional description
  • Connector pin assignments
  • Configuring the SDI paddle board
  • Applications
• NT8D41BA Quad Serial Data Interface Paddle Board
  • Contents
  • Introduction
  • Physical description
  • Functional description
  • Connector pin assignments
  • Configuring the QSDI paddle board
  • Applications
• NTAG26 XMFR card
  • Contents
  • Physical specifications
  • Introduction
• NTAK02 SDI/DCH card
  • Contents
  • Introduction
  • NTAK02 SDI/DCH card
• NTAK09 1.5 Mb DTI/PRI card
  • Contents
  • Introduction
  • Physical description
  • Functional description
  • Architecture
• NTAK10 2.0 Mb DTI card
  • Contents
  • Introduction
  • Physical description
  • Functional description
  • Architecture
• NTAK20 Clock Controller daughterboard
  • Contents
  • Introduction
  • Physical description
  • Functional description
• NTAK79 2.0 Mb PRI card
  • Contents
  • Introduction
  • Physical description
  • Functional description
  • Architecture
• NTAK93 D-channel Handler Interface daughterboard
  • Contents
  • Introduction
  • Physical description
  • Functional description
• NTBK22 MISP card
  • Contents
  • Introduction
  • Physical description
  • Functional description
• NTBK50 2.0 Mb PRI card
  • Contents
  • Introduction
  • Physical description
  • Functional description
  • Architecture
• NTBK51 Downloadable D-channel Handler daughterboard
  • Contents
  • Introduction
  • Physical description
  • Functional description
  • Download operation
• NTCK16 Generic Central Office Trunk cards
  • Contents
  • Introduction
  • Physical description
  • Functional description
  • Operation
  • Electrical specifications
  • Connector pin assignments
  • Configuration
  • Applications
• NTDK20 Small System Controller card
  • Contents
  • Introduction
  • Memory
  • 100BaseT IP daughterboards
  • PC card interface
  • Security device
  • SDI ports
  • Conferencing
  • Media Gateway/Media Gateway Expansion card slot assignment
• NTDW60 Media Gateway Controller Card
  • Contents
  • Introduction
  • Processor
  • Ethernet ports
    • External connections
    • Internal connections
  • Expansion daughterboards
  • Backplane interface
  • Serial data interface ports
    • TTY default settings
    • MGC serial port configuration change
  • Faceplate LED display
    • Faceplate LED display
• NTDW61 and NTDW66 Common Processor Pentium Mobile Card
  • Contents
  • Introduction
  • Cabinet/chassis support
  • Media storage
    • Fixed media drive
    • Removable media drive
    • Hard disk drive
  • Memory
  • Ethernet interfaces
    • ELAN
    • HSP
    • TLAN
  • Serial data interface ports
    • TTY parameters
  • USB 2.0 port
  • Security device
  • Faceplate
  • Faceplate buttons
    • Reset
    • Init
  • DIP switch
  • LED indicators
    • Status LED
    • Active CPU LED
    • Ethernet LEDs
    • Removable and fixed media drive LEDs
• NTDW62 and NTDW64 Media Gateway Controller Daughterboards
  • Contents
  • Introduction
  • Media Gateway Controller card
    • Daughterboard configurations
• NTDW65 Voice Gateway Media Card
  • Contents
  • Introduction
  • Ethernet ports
    • External connections
    • Internal connections
  • Backplane interfaces
  • Serial data interface ports
    • TTY settings
  • Faceplate LED display
• NTRB21 DTI/PRI/DCH TMDI card
  • Contents
  • Introduction
  • Physical description
  • Functional description
  • Software description
  • Hardware description
  • Architecture
• NTVQ01xx Media Card
  • Contents
  • Physical description
  • Hardware architecture
  • Functional description
  • Survivability
• NTVQ55AA ITG Pentium card
• QPC513 Enhanced Serial Data Interface card
  • Contents
  • Introduction
  • Physical description
  • Functional description
  • Connector pin assignments
  • Configuring the ESDI card
  • Applications
• QPC841 Quad Serial Data Interface card
  • Contents
  • Introduction
  • Physical description
  • Functional description
  • Connector pin assignments
  • Configuring the QSDI card
  • Applications
• The TDS/DTR card
  • Contents
  • Introduction
  • Features
• LAPB Data Link Control protocol
  • Contents
  • Introduction
  • Operation
  • Frame structure
  • LAPB balanced class of procedure
  • Commands and responses
  • Description of procedure
• Figures
  • Figure 1 IPE line cards shown installed in an NT8D37 IPE module
  • Figure 2 Typical IPE analog line card architecture
  • Figure 3 DS-30X loop data format
  • Figure 4 Typical analog line interface unit block diagram
  • Figure 5 Digital line interface unit block diagram
  • Figure 6 Call connection sequence - near-end station receiving call
  • Figure 7 Call connection sequence - near-end originating call
  • Figure 8 Battery reversal answer and disconnect supervision sequence
  • Figure 9 Hook flash disconnect supervision sequence
  • Figure 10 IPE trunk cards installed in an NT8D37 IPE module
  • Figure 11 Typical IPE trunk card architecture
  • Figure 12 DS-30X loop data format
  • Figure 13 Network connections to IPE modules
  • Figure 14 Typical trunk interface unit block diagram
  • Figure 15 Static discharge points
  • Figure 16 Installing the circuit card in the card cage
  • Figure 17 Circuit card grid
  • Figure 18 Switch functions and areas
  • Figure 19 Switch default settings
  • Figure 20 NT8D72 DIP switch settings
  • Figure 21 OPS analog line card - faceplate
  • Figure 22 OPS analog line card - block diagram
  • Figure 23 OPS analog line card - typical cross connection example
  • Figure 24 OPS analog line card - jumper block locations
  • Figure 25 Traditional OPS application configuration
  • Figure 26 CP PIV card (front)
  • Figure 27 CP PIV card (side)
  • Figure 28 Lineside T1 card faceplate
  • Figure 29 Lineside T1 card - faceplate
  • Figure 30 Lineside T1 card - block diagram
  • Figure 31 Lineside T1 card - block diagram
  • Figure 32 Lineside T1 card - T1 protocol dip switch locations
  • Figure 33 Lineside T1 card - T1 protocol dip switch locations
  • Figure 34 Lineside T1 card - connection using the NTSD13AA Lineside T1 cable
  • Figure 35 Lineside T1 card - connection using the NTSD13AA Lineside T1 cable
  • Figure 36 Lineside T1 card - connecting two or more cards to the MMI
  • Figure 37 Lineside T1 card - connecting two or more cards to the MMI
  • Figure 38 Lineside T1 card - connecting two or more cards to the MMI
  • Figure 39 MGC DECT Clock Reference Cable
  • Figure 40 MG1000 chassis
  • Figure 41 Option 11C Mini chassis or Succession 1.0 MG chassis
  • Figure 42 Option 11C Cabinet
  • Figure 43 MMI local loopback test
  • Figure 44 MMI external loopback test
  • Figure 45 MMI network loopback test
  • Figure 46 MMI Local loopback test
  • Figure 47 MMI External loopback test
  • Figure 48 MMI Network loopback test
  • Figure 49 Lineside T1 interface connection to IPE
  • Figure 50 Lineside T1 interface in off-premise application
  • Figure 51 Lineside T1 interface connection to Norstar system
  • Figure 52 Lineside T1 interface connection to peripheral equipment
  • Figure 53 Lineside T1 interface in off-premise application
  • Figure 54 Lineside T1 interface connection to Norstar system
  • Figure 55 NT5D33AB LEI card - faceplate
  • Figure 56 NT5D34AB LEI card - faceplate
  • Figure 57 LEI card - block diagram
  • Figure 58 CAS+ compliance
  • Figure 59 LEI card - E1 protocol dip switch locations
  • Figure 60 LEI card - connecting two or more cards to the MMI
  • Figure 61 MGC DECT Clock Reference Cable
  • Figure 62 MG1000 chassis
  • Figure 63 Option 11C Mini chassis or Succession 1.0 MG chassis
  • Figure 64 Option 11C Cabinet
  • Figure 65 HELP (H, ?) screen
  • Figure 66 Set Simple (S S) no screen
  • Figure 67 Set Simple (S S) yes screen
  • Figure 68 Set Mode screen
  • Figure 69 Set Mode (S M): Table screen
  • Figure 70 Set Mode (S M): Table screen
  • Figure 71 Display Configuration (D C) screen
  • Figure 72 Display Alarm (D A) screen
  • Figure 73 Display Status (D S) screen
  • Figure 74 Display Performance (D P) screen
  • Figure 75 Display History (D H) screen
  • Figure 76 Test Carrier (T) screen
  • Figure 77 Test parameters screen
  • Figure 78 MMI Local loopback test
  • Figure 79 MMI External loopback test
  • Figure 80 MMI Network loopback test
  • Figure 81 LEI connection to IPE
  • Figure 82 LEI in off-premise extension application
  • Figure 83 LEI connection to Norstar system
  • Figure 84 NT5D97 faceplate
  • Figure 85 NTCK45AA
  • Figure 86 NT8D7217
  • Figure 87 NTCK78AA
  • Figure 88 NTCK79AA
  • Figure 89 NTCG03AA/AB/AC/AD
  • Figure 90 NTCK46AA/AB/AC/AD
  • Figure 91 NTCK80AA/AB/AC/AD
  • Figure 92 DDP2 cable for systems with an I/O panel
  • Figure 93 DDP2 cable for systems without an I/O panel
  • Figure 94 Dip switches for NT5D97AA/AB
  • Figure 95 Dip switches locations for NT5D97AD
  • Figure 96 Clock Controller primary and secondary tracking
  • Figure 97 Clock Controller - Option 1
  • Figure 98 Clock Controller - Option 2
  • Figure 99 Clock Controller - Option 3
  • Figure 100 Clock Controller - Option 4
  • Figure 101 MSDL component layout
  • Figure 102 MSDL block diagram
  • Figure 103 MSDL functional block diagram
  • Figure 104 MSDL switch setting example
  • Figure 105 MSDL cabling
  • Figure 106 MSDL states
  • Figure 107 NT7D16 Data Access card faceplate
  • Figure 108 DAC to modem connectivity
  • Figure 109 DAC to Modem Pool connectivity
  • Figure 110 DAC to Gateway connectivity
  • Figure 111 DAC to Gateway-Inbound/Outbound connectivity
  • Figure 112 DAC to Host connectivity
  • Figure 113 DAC to Terminal connectivity
  • Figure 114 Operating mode selection-RS422
  • Figure 115 Operating mode selection-RS-232-C
  • Figure 116 NT7D16 Data Access Card port connectors
  • Figure 117 Cabling to the data equipment
  • Figure 118 RJ-11 or RJ-45 jacks
  • Figure 119 Patch panel layout
  • Figure 120 Octopus cabling
  • Figure 121 Macintosh to DAC connection-9-pin subminiature D
  • Figure 122 Macintosh to DAC connection-mini-8 DIN
  • Figure 123 Digital line card - faceplate
  • Figure 124 Digital line card - faceplate
  • Figure 125 Digital line card - faceplate
  • Figure 126 Digital line card - block diagram
  • Figure 127 NTDK16 DLC
  • Figure 128 Digital line card - block diagram
  • Figure 129 NT8D02 Digital Line Card - block diagram
  • Figure 130 NTDK16 DLC
  • Figure 131 Digital line card - jumper block and switch locations
  • Figure 132 Digital line card - jumper block and switch locations
  • Figure 133 Digital line card - jumper block and switch locations
  • Figure 134 Analog message waiting line card - faceplate
  • Figure 135 Analog message waiting line card - block diagram
  • Figure 136 Analog message waiting line card - block diagram
  • Figure 137 Analog message waiting line card - typical cross connection example
  • Figure 138 Analog message waiting line card - jumper block and switch locations
  • Figure 139 Analog message waiting line card - typical cross connection example
  • Figure 140 Analog message waiting line card - jumper block and switch locations
  • Figure 141 Universal trunk card - faceplate
  • Figure 142 Universal trunk card - faceplate
  • Figure 143 Universal trunk card - faceplate
  • Figure 144 NT8D14 Universal trunk card - block diagram
  • Figure 145 Universal trunk card - block diagram
  • Figure 146 NT8D14 Universal trunk card - block diagram
  • Figure 147 Loop start call states - incoming call from CO/FX/WATS
  • Figure 148 Loop start call connection sequence - incoming call from CO/FX/WATS
  • Figure 149 Loop start call states - incoming call
  • Figure 150 Loop start call connection sequence - incoming call
  • Figure 151 Ground start call states - incoming call from CO/FX/WATS
  • Figure 152 Ground start call connection sequence - incoming call from CO/FX/WATS
  • Figure 153 Loop start call states - incoming call from CO/FX/WATS
  • Figure 154 Loop start call connection sequence - incoming call from CO/FX/WATS
  • Figure 155 Loop start call states - outgoing call to CO/FX/WATS
  • Figure 156 Loop start call connection sequence - outgoing call to CO/FX/WATS
  • Figure 157 Ground start call states - incoming call from CO/FX/WATS
  • Figure 158 Ground start call connection sequence - incoming call from CO/FX/WATS
  • Figure 159 Ground start call states - incoming call
  • Figure 160 Ground start call connection sequence - incoming call
  • Figure 161 Ground start call states - incoming call from CO/FX/WATS
  • Figure 162 Ground start call connection sequence - incoming call from CO/FX/WATS
  • Figure 163 Ground start call states - outgoing call to CO/FX/WATS
  • Figure 164 Ground start call connection sequence - outgoing call to CO/FX/WATS
  • Figure 165 Ground start call states - outgoing call to CO/FX/WATS
  • Figure 166 Ground start call connection sequence - outgoing call to CO/FX/WATS
  • Figure 167 Ground start call states - outgoing call
  • Figure 168 Ground start call connection sequence - outgoing call
  • Figure 169 Loop start call states - outgoing call
  • Figure 170 Loop start call connection sequence
  • Figure 171 DID trunk, loop DR call states - incoming call from CO
  • Figure 172 DID trunk, loop DR call connection sequence - incoming call from CO
  • Figure 173 DID trunk, loop DR call states - incoming call from CO
  • Figure 174 DID trunk, loop DR call connection sequence - incoming call from CO
  • Figure 175 Two-way, loop DR, TIE trunk call states - incoming call from far-end PBX
  • Figure 176 Two-way, loop DR, TIE trunk call connection sequence - incoming call from far-end PBX
  • Figure 177 Two-way, loop DR, TIE trunk call states - incoming call from far-end PBX
  • Figure 178 Two-way, loop DR, TIE trunk call connection sequence - incoming call from far-end PBX
  • Figure 179 Two-way, loop DR, TIE trunk call states - outgoing call to far-end PBX
  • Figure 180 Two-way, loop DR, TIE trunk call connection sequence - outgoing call to far-end PBX
  • Figure 181 Two-way, loop DR, TIE trunk call states - outgoing call to far-end PBX
  • Figure 182 Two-way, loop DR, TIE trunk call connection sequence - outgoing call to far-end PBX
  • Figure 183 Two-way, loop DR, TIE trunk call states - outgoing call to far-end PBX
  • Figure 184 Two-way, loop DR, TIE trunk call connection sequence - outgoing call to far-end PBX
  • Figure 185 DID trunk, loop DR call states - incoming call
  • Figure 186 DID trunk, loop DR call connection sequence - incoming call
  • Figure 187 Two-way, loop DR, tie trunk call states - incoming call from far-end PBX
  • Figure 188 Two-way, loop DR, tie trunk call connection sequence - incoming call from far-end PBX
  • Figure 189 Two-way, loop DR, tie trunk call states - outgoing call to far-end PBX
  • Figure 190 Two-way, loop DR, tie trunk call connection sequence - outgoing call to far-end PBX
  • Figure 191 Two-way, loop DR, TIE trunk call states - incoming call through senderized, tandem PBX from a CO/FX/WATS trunk
  • Figure 192 Two-way, loop DR, TIE trunk call states - incoming call through senderized, tandem PBX from a CO/FX/WATS trunk
  • Figure 193 Two-way, loop DR, TIE trunk call states - outgoing call through far-end PBX to CO/FX/WATS
  • Figure 194 Two-way, loop DR, TIE trunk call states - incoming call through senderized, tandem PBX from a CO/FX/WATS trunk
  • Figure 195 Two-way, loop DR, TIE trunk call states - outgoing call through far-end PBX to CO/FX/WATS
  • Figure 196 Two-way, loop DR, tie trunk call states - incoming call through a senderized, tandem PBX from a CO
  • Figure 197 Two-way, loop DR, tie trunk call states - outgoing call through far-end PBX to CO
  • Figure 198 Two-way, loop OAID, TIE trunk call states - incoming call from far-end PBX
  • Figure 199 Two-way, loop OAID, TIE trunk call connection sequence - incoming call from far-end PBX
  • Figure 200 Two-way, loop OAID, TIE trunk call states - outgoing call to far-end PBX
  • Figure 201 Two-way, loop OAID, TIE trunk call connection sequence - outgoing call to far-end PBX
  • Figure 202 Two-way, loop OAID, TIE trunk call states - incoming call from far-end PBX
  • Figure 203 Two-way, loop OAID, tie trunk call states - incoming call from far-end PBX
  • Figure 204 Two-way, loop OAID, TIE trunk call connection sequence - incoming call from far-end PBX
  • Figure 205 Two-way, loop OAID, TIE trunk call states - outgoing call to far-end PBX
  • Figure 206 Two-way, loop OAID, TIE trunk call connection sequence - outgoing call to far-end PBX
  • Figure 207 Two-way, loop OAID, tie trunk call states - incoming call from far-end PBX
  • Figure 208 Two-way, loop OAID, tie trunk call states - outgoing call to far-end PBX
  • Figure 209 Two-way, loop OAID, tie trunk call connection sequence - outgoing call to far-end PBX
  • Figure 210 Connecting RAN equipment to the NT8D14 Universal Trunk card (typical)
  • Figure 211 Connecting RAN equipment to the NT8D14 Universal Trunk Card (typical)
  • Figure 212 RAN control signals (Control GRD = IDLE)
  • Figure 213 RAN control signals (Control GRD = IDLE)
  • Figure 214 RAN control signals (Control GRD = IDLE)
  • Figure 215 Universal trunk card - typical cross connect example
  • Figure 216 Universal trunk card - jumper locations for NT8D14BA and NT8D14BB Release 9 and below
  • Figure 217 Universal trunk card - jumper locations for NT8D14BB Release 10 and higher
  • Figure 218 Universal trunk card - jumper locations for NT8D14BA and NT8D14BB Release 9 and below
  • Figure 219 Universal trunk card - jumper locations for NT8D14BA and NT8D14BB Release 9 and below
  • Figure 220 Connecting paging equipment to the NT8D14 Universal Trunk card (typical)
  • Figure 221 Connecting paging equipment to the NT8D14 Universal Trunk Card (typical)
  • Figure 222 Connecting paging equipment to the NT8D14 Universal Trunk Card (typical)
  • Figure 223 E and M Trunk card - faceplate
  • Figure 224 E and M Trunk card - faceplate
  • Figure 225 E and M Trunk card - block diagram
  • Figure 226 E and M Trunk card - block diagram
  • Figure 227 E and M Trunk card - block diagram
  • Figure 228 E and M Type I signaling
  • Figure 229 E and M Type II signaling
  • Figure 230 4-wire DX signaling
  • Figure 231 Paging trunk operation
  • Figure 232 E and M Type I signaling
  • Figure 233 E and M Type II signaling
  • Figure 234 4-wire DX signaling
  • Figure 235 Paging trunk operation
  • Figure 236 E and M Type I signaling
  • Figure 237 4-wire DX signaling
  • Figure 238 Paging trunk operation
  • Figure 239 Signaling orientation for tandem connection between E and M and CO trunks
  • Figure 240 E and M Type I signaling patterns - originating party release
  • Figure 241 E and M Type I signaling patterns - originating party release on a tandem connection
  • Figure 242 Signaling orientation for tandem connection between E and M and CO trunks
  • Figure 243 E and M Type I signaling patterns - originating party release
  • Figure 244 E and M Type I signaling patterns - originating party release on a tandem connection
  • Figure 245 E and M Type II signaling patterns - originating party release
  • Figure 246 E and M Type II signaling patterns - originating party release on a tandem connection
  • Figure 247 Signaling orientation for tandem connection between E and M and CO trunks
  • Figure 248 E and M type signaling patterns - originating party release
  • Figure 249 E and M Type I signaling patterns - originating party release on a tandem connection
  • Figure 250 E and M Type II signaling patterns - originating party release
  • Figure 251 E and M Type II signaling patterns - originating party release on a tandem connection
  • Figure 252 E and M Trunk card - typical cross connection example
  • Figure 253 E and M Trunk card - typical cross connection example
  • Figure 254 E and M Trunk card - typical cross connection example
  • Figure 255 E and M Trunk card - jumper locations
  • Figure 256 Pad orientation
  • Figure 257 Pad orientation
  • Figure 258 Pad orientation
  • Figure 259 Paging trunk operation
  • Figure 260 Paging trunk operation
  • Figure 261 Paging trunk operation
  • Figure 262 NT8D41AA SDI paddle board
  • Figure 263 NT8D41AA SDI paddle board block diagram
  • Figure 264 SDI paddle board option switch locations
  • Figure 265 SDI paddle board cabling
  • Figure 266 NT8D41AA SDI paddle board
  • Figure 267 NT8D41AA SDI paddle board block diagram
  • Figure 268 SDI paddle board option switch locations
  • Figure 269 SDI paddle board cabling
  • Figure 270 NT8D41BA QSDI paddle board
  • Figure 271 NT8D41BA QSDI paddle board block diagram
  • Figure 272 NT8D41BA QSDI paddle board cabling
  • Figure 273 NT8D41BA QSDI paddle board
  • Figure 274 NT8D41BA QSDI paddle board block diagram
  • Figure 275 NT8D41BA QSDI paddle board cabling
  • Figure 276 NTAK09 DTI/PRI circuit card
  • Figure 277 NTAK09 DTI/PRI circuit card
  • Figure 278 NTAK79 card with switch locations
  • Figure 279 NTAK79 card with switch locations
  • Figure 280 NTBK50 2.0 Mb PRI card with daughterboards
  • Figure 281 NTBK50 2.0 Mb PRI card with daughterboards
  • Figure 282 NTCK16 Central Office trunk connections for NT8D37 I/O panel connectors A, E, K, R
  • Figure 283 NTCK16 Central Office trunk connections for NT8D37 I/O panel connectors B, F, L, S
  • Figure 284 NTCK16 Central Office trunk connections for NT8D37 I/O panel connectors C, G, M, T
  • Figure 285 NTDK20 SSC card and expansion daughterboard in the Call Server
  • Figure 286 NTDK83AA dual-port 100BaseT IP daughterboard
  • Figure 287 NTDK99A single-port 100BaseT IP daughterboard
  • Figure 288 Call Server connection to Media Gateway
  • Figure 289 Media Gateway slots
  • Figure 290 Media Gateway Expansion slots
  • Figure 291 MGC block diagram
  • Figure 292 CP PM high level hardware block diagram
  • Figure 293 CP PM card
  • Figure 294 CP PM NTDW61 and NTDW66 faceplates
  • Figure 295 ELAN and TLAN port LED indicators
  • Figure 296 HSP port LED indicators
  • Figure 297 Media Gateway Controller with daughterboards
  • Figure 298 Daughterboard
  • Figure 299 Voice Gateway Media card block diagram
  • Figure 300 NTRB21 TMDI card with clock controller
  • Figure 301 NTRB21 TMDI card faceplate
  • Figure 302 NTRB21 TMDI card with clock controller
  • Figure 303 NTRB21 TMDI card faceplate
  • Figure 304 NTRB21 TMDI card faceplate
  • Figure 305 NTRB21 TMDI card faceplate
  • Figure 306 NTVQ01xx Media Card
  • Figure 307 NTVQ01xx Media Card faceplate
  • Figure 308 NTVQ55AA ITG-P card faceplate
  • Figure 309 CPC513 ESDI card front panel
  • Figure 310 ESDI card block diagram
  • Figure 311 Typical high-speed interface line driver and receiver
  • Figure 312 ESDI card option switch locations
  • Figure 313 QPC513 ESDI card cabling
  • Figure 314 QPC841 QSDI card front panel
  • Figure 315 QPC841 QSDI card block diagram
  • Figure 316 QSDI card option switch locations
  • Figure 317 QPC841 QSDI card cabling
  • Figure 318 Balanced configuration
• Tables
  • Table 1 Line card characteristics
  • Table 2 IPE module architecture
  • Table 3 Loop Start Call Processing A/B Bit Settings
  • Table 4 Ground Start Call Processing A/B Bit Settings
  • Table 5 Line protection device ordering information
  • Table 6 Trunk card characteristics
  • Table 7 Differences between IPE parameters
  • Table 8 Serial data interface cards
  • Table 9 Power consumption
  • Table 10 Environmental specifications
  • Table 11 Large System card slots
  • Table 12 TDS tone tests
  • Table 13 OPS analog line card configuration
  • Table 14 General purpose switch settings
  • Table 15 Trunk interface transmission mode switch settings
  • Table 16 Trunk interface line build out switch settings
  • Table 17 Trunk interface impedance switch settings
  • Table 18 Ring ground switch settings
  • Table 19 DCH mode and address select switch settings
  • Table 20 NTBK51AA daughterboard address select switch settings
  • Table 21 NT6D42 recommended options for North American and British Telecom
  • Table 22 NT6D42 jumper locations P4 and P5
  • Table 23 NT6D42 jumper location J7
  • Table 24 NT6D42 SW1
  • Table 25 NT6D42CB SW2
  • Table 26 NT6D42CC SW2
  • Table 27 NT5D2101/NT9D1102 Core/Network module backplane
  • Table 28 NT6D68 Core module backplane
  • Table 29 NT6D80 Multi-purpose Serial Data Link card
  • Table 30 NT8D14 vintage AA jumper strap settings
  • Table 31 NT8D14 vintages BA/BB jumper strap settings-factory standard
  • Table 32 NT8D14 vintages BA/BB jumper strap settings-extended range
  • Table 33 NT8D14 vintages BA/BB trunk types-termination impedance and balance network
  • Table 34 NT8D14 vintages BA/BB cable loop resistance and loss
  • Table 35 NT8D15 E and M Trunk card
  • Table 36 NT8D22 SW1
  • Table 37 NT8D22 SW2
  • Table 38 NT8D22 SW3
  • Table 39 NT8D22 settings for total number of slaves-SW2 on master
  • Table 40 NT8D22AD/NT8D22ADE5 slave address-SW2 on slave
  • Table 41 QSDI paddle board baud rate switch settings
  • Table 42 QSDI paddle board address switch settings
  • Table 43 QSDI paddle board DTE/DCE mode switch settings
  • Table 44 QPC441 3PE card installed in the NT4N41CP PII Core Net modules
  • Table 45 QPC441 3PE card installed in the NT5D21 modules
  • Table 46 QPC441 3PE card installed in the NT8D35 module
  • Table 47 QPC559, QPC560 single density
  • Table 48 QPC559, QPC560 double density
  • Table 49 QPC528 Trunk cards switch and jumper settings
  • Table 50 QPC471 vintage H
  • Table 51 QPC550 vintages A and B-real/complex balance impedance selection
  • Table 52 QPC550 vintage A-600/900 Ohm impedance selection
  • Table 53 QPC550 vintage A-software/hardware control for 2dB pad
  • Table 54 QPC550 vintage B-attenuation level control
  • Table 55 QPC550 vintage B-software control for 2dB pad
  • Table 56 QPC720 Primary Rate Interface card
  • Table 57 QPC775 (before vintage E) switch settings
  • Table 58 QPC775 vintage E switch settings
  • Table 59 QPC841 port 1 and 2 address selection
  • Table 60 QPC841 baud rate
  • Table 61 QPC841 DTE or DCE selection
  • Table 62 OPS analog line card configuration
  • Table 63 OPS analog line card - cable loop resistance and loss
  • Table 64 OPS analog line card - electrical characteristics
  • Table 65 OPS analog line card - power requirements
  • Table 66 OPS analog line card - ringer limitations
  • Table 67 OPS analog line card - environmental specifications
  • Table 68 Call connection sequence-near-end station receiving call
  • Table 69 Call connection sequence-near-end station receiving call
  • Table 70 OPS analog line card - backplane pinouts
  • Table 71 OPS analog line card - configuration
  • Table 72 COM1 and COM2 pin assignments
  • Table 73 USB connector pin outs
  • Table 74 Ethernet connector pin outs
  • Table 75 Front panel LED functionality
  • Table 76 ITP connector pin outs
  • Table 77 NT5D14AA Lineside T1 Faceplate LEDs
  • Table 78 NT5D14AA Lineside T1 faceplate LEDs
  • Table 79 Lineside T1 card LED operation
  • Table 80 Lineside T1 card - line interface unit electrical characteristics
  • Table 81 Lineside T1 card - line interface unit electrical characteristics
  • Table 82 Lineside T1 card - power required
  • Table 83 Lineside T1 card - power required
  • Table 84 Lineside T1 card: power required
  • Table 85 Lineside T1 card - environmental specifications
  • Table 86 Lineside T1 card - environmental specifications
  • Table 87 Lineside T1 card-T1 Switch 1 (S1) dip switch settings
  • Table 88 Lineside T1 card - XPEC address dip switch settings (Switch S1, positions 3 - 6)
  • Table 89 Lineside T1 card - T1 Switch 2 (S2) dip switch settings
  • Table 90 Lineside T1 card - CPE or CSU distance dip switch settings (Switch S2, positions 3 - 5)
  • Table 91 Lineside T1 card-T1 Switch 1 (S1) dip switch settings
  • Table 92 Lineside T1 card - XPEC address dip switch settings (Switch S1, positions 3 - 6)
  • Table 93 Lineside T1 card - T1 Switch 2 (S2) dip switch settings
  • Table 94 Lineside T1 card - CPE or CSU distance dip switch settings (Switch S2, positions 3 - 5)
  • Table 95 Lineside T1 card - NT8D37 IPE module vintage level port cabling
  • Table 96 Lineside T1 card - NT8D37 IPE Module vintage level port cabling
  • Table 97 Lineside T1 card - backplane pinouts
  • Table 98 Lineside T1 card - NT5D13AA connector pinouts
  • Table 99 Lineside T1 card - backplane pinouts
  • Table 100 Lineside T1 card - NT5D13AA Connector pinouts
  • Table 101 DX-30 to T1 time slot mapping
  • Table 102 DX-30 to T1 time slot mapping
  • Table 103 MMI commands and command sets
  • Table 104 MMI commands and command sets
  • Table 105 T1 bit error rate threshold settings
  • Table 106 Set alarm options
  • Table 107 T1 bit error rate threshold settings
  • Table 108 Set alarm options
  • Table 109 MMI Tests
  • Table 110 MMI Tests
  • Table 111 LEI card LED operation
  • Table 112 LEI card - line interface unit electrical characteristics
  • Table 113 LEI card - power required
  • Table 114 LEI card - environmental specifications
  • Table 115 LEI card - Switch 1 dip switch settings
  • Table 116 LEI card - signaling-type dip switch settings
  • Table 117 LEI card - XPEC address dip switch settings (Switch S1, positions 3-6)
  • Table 118 LEI card - E1 Switch 2 (S2) dip switch settings
  • Table 119 ELEI card - E1 Switch 2 (S2) dip switch settings
  • Table 120 LEI card - NT8D37 IPE module vintage level port cabling
  • Table 121 LEI card - LEI backplane and I/O panel pinouts
  • Table 122 LEI card - lineside E1 I/O cable pinouts
  • Table 123 Card unit number to E1 channel mapping
  • Table 124 MMI commands and command sets
  • Table 125 E1 bit error rate threshold settings
  • Table 126 Set alarm options
  • Table 127 MMI Tests
  • Table 128 Time slot mapping
  • Table 129 Time slot mapping
  • Table 130 CLASS modem card-data transmission electrical characteristics
  • Table 131 CLASS modem card-data transmission electrical characteristics
  • Table 132 CLASS modem card - environmental specifications
  • Table 133 CLASS modem card - environmental specifications
  • Table 134 DCH/MSDL Receiver Ready control signals
  • Table 135 External connectors and LEDs
  • Table 136 NT5D97AA/AB loops configuration
  • Table 137 NT5D97AD loops configuration
  • Table 138 NT5D97 DDP2 power requirements
  • Table 139 NTCK45AA cable pins
  • Table 140 NT8D7217 cable pins
  • Table 141 NTCK78AA cable pins
  • Table 142 NTCK79AA cable pins
  • Table 143 DIP switch settings for NT5D97AA/AB
  • Table 144 Impedance level and loop mode switch settings
  • Table 145 Impedance level and loop mode switch settings
  • Table 146 Trunk interface line build out switch settings
  • Table 147 Trunk interface impedance switch settings
  • Table 148 Ring ground switch settings
  • Table 149 DCH mode and address switch settings
  • Table 150 NTBK51AA daughterboard address select switch settings
  • Table 151 DIP switch settings for NT5D97AD
  • Table 152 General purpose switches for NT5D97AD
  • Table 153 TX mode switches for NT5D97AD
  • Table 154 LBO switches for NT5D97AD
  • Table 155 Receiver interface switches for NT5D97AD
  • Table 156 Trunk 1 switches
  • Table 157 Ring ground switch for NT5D97AD
  • Table 158 NTBK51AA DCH switches for NT5D97AD
  • Table 159 Switch settings for MSDL external card
  • Table 160 Switch setting for MSDL external card
  • Table 161 Clock Controller options - summary
  • Table 162 Clock Controller options - description
  • Table 163 MFC Frequency values
  • Table 164 MFE Frequency values
  • Table 165 XMFC sender specifications
  • Table 166 XMFC receiver specifications
  • Table 167 XMFE sender specifications
  • Table 168 XMFE receiver specifications
  • Table 169 Physical specifications
  • Table 170 Synchronous interface specifications
  • Table 171 Asynchronous interface specifications
  • Table 172 RS-232 interface pin assignments
  • Table 173 RS-422 interface pin assignments
  • Table 174 Environmental requirements
  • Table 175 MSDL power consumption
  • Table 176 MSDL interface switch settings
  • Table 177 Cable types
  • Table 178 Wire test signal leads cycle counts
  • Table 179 DAC mode of operation selection
  • Table 180 Connect and disconnect protocol
  • Table 181 Hayes dialing result codes and messages
  • Table 182 AT dialing commands
  • Table 183 Allowable S registers
  • Table 184 Hayes parameters and S register reset values
  • Table 185 Allowed outbound call command characters
  • Table 186 Virtual key assignments
  • Table 187 EIA signals supported (RS-232-C)
  • Table 188 DAC environmental specifications
  • Table 189 System option compatibility with the DAC
  • Table 190 RS-232-C maximum line capacitance 2,500 µF
  • Table 191 RS-422 maximum line capacitance 60,000 µF
  • Table 192 RS-232-C and RS-422 pinouts for first three DAC ports
  • Table 193 RS-232-C and RS-422 pinouts for last three DAC ports
  • Table 194 Print out example
  • Table 195 NT8D02/NTDK16 Digital Line card technical summary
  • Table 196 NT8D02/NTDK16 Digital Line Card technical summary
  • Table 197 Digital line card - line interface unit electrical characteristics
  • Table 198 NT8D02 Digital Line Card - line interface unit electrical characteristics
  • Table 199 Digital line card-power required
  • Table 200 Digital line card-power required
  • Table 201 NT8D02 Digital Line Card - power requirements
  • Table 202 Digital line card - environmental specifications
  • Table 203 Digital line card - environmental specifications
  • Table 204 NT8D02 Digital Line Card - environmental specifications
  • Table 205 NT8D02 Digital Line card - backplane pinouts
  • Table 206 Digital line card - backplane pinouts
  • Table 207 NT8D02 Digital Line Card - backplane pinouts
  • Table 208 NT8D09 Analog Message Waiting Line card application and compatibility
  • Table 209 NT8D09 Analog Message Waiting Line Card application and compatibility
  • Table 210 NT8D09 Analog Message Waiting Line Card application and compatibility
  • Table 211 Analog message waiting line card - line interface unit electrical characteristics
  • Table 212 Analog message waiting line card - frequency response
  • Table 213 NT8D09 Analog Message Waiting Line Card frequency response
  • Table 214 NT8D09 Analog Message Waiting Line Card frequency response
  • Table 215 NT8D09 Analog Message Waiting Line card technical summary
  • Table 216 NT8D09 Analog Message Waiting Line Card technical summary
  • Table 217 NT8D09 Analog Message Waiting Line Card technical summary
  • Table 218 Analog message waiting line card - frequency response
  • Table 219 Power requirements
  • Table 220 Analog message waiting line card - power requirements
  • Table 221 Power requirements
  • Table 222 Power requirements
  • Table 223 Analog message waiting line card - environmental specifications
  • Table 224 Analog message waiting line card - environmental specifications
  • Table 225 Analog message waiting line card - backplane pinouts
  • Table 226 Transmission Profile Changes
  • Table 227 Analog message waiting line card - backplane pinouts
  • Table 228 Transmission Profile Changes
  • Table 229 Trunk and signaling matrix
  • Table 230 Trunk and signaling matrix
  • Table 231 Trunk and signaling matrix
  • Table 232 Supported trunk type and signaling matrix
  • Table 233 Universal trunk card - trunk interface electrical characteristics
  • Table 234 Universal trunk card - trunk interface electrical characteristics
  • Table 235 NT8D14 Universal trunk card - trunk interface electrical characteristics
  • Table 236 Universal Trunk Card electrical characteristics
  • Table 237 Power requirements for universal trunk card
  • Table 238 Power requirements
  • Table 239 Power requirements for universal trunk card
  • Table 240 Power requirements
  • Table 241 Environmental specifications for the NT8D14 Universal Trunk card
  • Table 242 Environmental specifications
  • Table 243 Environmental specifications for the NT8D14 Universal Trunk Card
  • Table 244 Environmental specifications
  • Table 245 Insertion Loss from IPE Ports to IPE Ports (measured in dB)
  • Table 246 Insertion Loss from IPE Ports to IPE Ports (measured in dB)
  • Table 247 Universal trunk card - backplane pinouts
  • Table 248 Universal trunk card - backplane pinouts
  • Table 249 Universal trunk card - backplane pinouts
  • Table 250 Jumper strap settings - factory standard (NT8D14BA, NT8D14BB)
  • Table 251 Jumper strap settings - extended range (NT8D14BA, NT8D14BB, NT8D14BB)
  • Table 252 Trunk types - termination impedance and balance network (NT8D14BA, NT8D14BB)
  • Table 253 Trunk types - termination impedance and balance network (NT8D14BA, NT8D14BB)
  • Table 254 Cable loop resistance and loss
  • Table 255 Jumper strap settings - factory standard (NT8D14BA, NT8D14BB)
  • Table 256 Jumper strap settings - extended range (NT8D14BA, NT8D14BB, NT8D14BB Release 10 and up)
  • Table 257 Trunk types - termination impedance and balance network (NT8D14BA, NT8D14BB)
  • Table 258 Cable loop resistance and loss
  • Table 259 Jumper strap settings - factory standard (NT8D14BA, NT8D14BB)
  • Table 260 Jumper strap settings - extended range (NT8D14BA, NT8D14BB, NT8D14BB Release 10 and later)
  • Table 261 Trunk types - termination impedance and balance network (NT8D14BA, NT8D14BB)
  • Table 262 Cable loop resistance and loss
  • Table 263 Pad switching algorithm
  • Table 264 Pad switching algorithm
  • Table 265 Pad switching algorithm
  • Table 266 Trunk and signaling matrix
  • Table 267 Trunk and signaling matrix
  • Table 268 Trunk and signaling matrix
  • Table 269 Supported trunk and signaling matrix
  • Table 270 Operation Mode
  • Table 271 Operation mode
  • Table 272 Operation Mode
  • Table 273 DX signaling - outgoing calls with originating party release
  • Table 274 DX signaling - incoming calls with originating party release
  • Table 275 DX signaling - outgoing calls with originating party release on tandem connections
  • Table 276 DX signaling - incoming calls with originating party release on tandem connections
  • Table 277 DX signaling - outgoing calls with originating party release
  • Table 278 DX signaling - incoming calls with originating party release
  • Table 279 DX signaling - outgoing calls with originating party release on tandem connections
  • Table 280 DX signaling - incoming calls with originating party release on tandem connections
  • Table 281 DX signaling - outgoing calls with originating party release
  • Table 282 DX signaling - incoming calls with originating party release
  • Table 283 DX signaling - outgoing calls with originating party release on tandem connections
  • Table 284 DX signaling - incoming calls with originating party release on tandem connections
  • Table 285 Electrical characteristics of E and M Trunk cards
  • Table 286 Electrical characteristics of trunk cards
  • Table 287 Electrical characteristics
  • Table 288 Electrical characteristics of the E and M Trunk interface
  • Table 289 Power requirements
  • Table 290 Power requirements
  • Table 291 Power requirements
  • Table 292 Power requirements
  • Table 293 Environmental specifications
  • Table 294 Environmental specifications
  • Table 295 Environmental specifications
  • Table 296 Environmental specifications
  • Table 297 E and M Trunk card - backplane pinouts for 2-wire modes
  • Table 298 E and M Trunk card - backplane pinouts for 4-wire modes
  • Table 299 E and M Trunk card - backplane pinouts for 2-wire modes
  • Table 300 E and M Trunk card - backplane pinouts for 4-wire modes
  • Table 301 E and M Trunk card - backplane pinouts for 2-wire modes
  • Table 302 E and M Trunk card - backplane pinouts for 4-wire modes
  • Table 303 E and M Trunk card - jumper strap settings
  • Table 304 E and M Trunk card - jumper strap settings
  • Table 305 E and M Trunk card - jumper strap settings
  • Table 306 Pad switching algorithm
  • Table 307 Pad switching algorithm
  • Table 308 Pad switching algorithm
  • Table 309 Insertion Loss from IPE Ports to IPE Ports (measured in dB)
  • Table 310 Insertion Loss from IPE Ports to IPE Ports (measured in dB)
  • Table 311 Connectors J1 and J2 pin assignments
  • Table 312 SDI paddle board address switch settings
  • Table 313 SDI paddle board baud rate switch settings
  • Table 314 NT8D41AA DTE/DCE/Fiber switch settings
  • Table 315 Connectors J1 and J2 pin assignments
  • Table 316 SDI paddle board address switch settings
  • Table 317 SDI paddle board baud rate switch settings
  • Table 318 NT8D41AA DTE/DCE/Fiber switch settings
  • Table 319 Serial port configuration parameters
  • Table 320 Connectors J1, J2, J3, and J4 pin assignments
  • Table 321 NT8D41BA baud rate switch settings
  • Table 322 NT8D41BA address switch settings
  • Table 323 NT8D41BA address switch settings
  • Table 324 NT8D41BA DTE/DCE/Fiber switch settings
  • Table 325 LD 17 - Prompts to configure the NT8D841Ba paddle board.
  • Table 326 Connectors J1, J2, J3, and J4 pin assignments
  • Table 327 NT8D41BA baud rate switch settings
  • Table 328 NT8D41BA address switch settings
  • Table 329 NT8D41BA DTE/DCE/Fiber switch settings
  • Table 330 MF frequency values
  • Table 331 XMFR receiver specifications
  • Table 332 Physical specifications
  • Table 333 MF frequency values
  • Table 334 XMFR receiver specifications
  • Table 335 Physical specifications
  • Table 336 Port configurations
  • Table 337 Switch settings
  • Table 338 Jumper settings
  • Table 339 NTAK02 pinouts - Port 0 at the cross-connect terminal
  • Table 340 NTAK02 connections at the cross-connect terminal - Port 1
  • Table 341 NTAK02 connections at the cross-connect terminal - Port 2
  • Table 342 NTAK02 connections at the cross-connect terminal - Port 3
  • Table 343 Port configurations
  • Table 344 Switch settings
  • Table 345 Jumper settings
  • Table 346 NTAK02 pinouts - Port 0 at the cross-connect terminal
  • Table 347 NTAK02 connections at the cross-connect terminal - Port 1
  • Table 348 NTAK02 connections at the cross-connect terminal - Port 2
  • Table 349 NTAK02 connections at the cross-connect terminal - Port 3
  • Table 350 NTAK09 LED states
  • Table 351 NTAK09 LED states
  • Table 352 NTAK09 LED states
  • Table 353 NTAK09 LED states during self-test
  • Table 354 NTAK09 LED states during self-test
  • Table 355 Digital pad values and offset allocations
  • Table 356 Digital pad values and offset allocations
  • Table 357 Digital pad values and offset allocations
  • Table 358 NTAK09 switch settings
  • Table 359 NTAK09 switch settings
  • Table 360 NTAK09 switch settings
  • Table 361 DS-1 line interface pinout for NTBK04 cable
  • Table 362 DS-1 line interface pinout for NTBK04 cable
  • Table 363 DS-1 line interface pinout for NTBK04 cable
  • Table 364 NTAK10 LED states
  • Table 365 NTAK10 LED states
  • Table 366 NTAK10 LED states
  • Table 367 2 MB DTI switch options
  • Table 368 2 MB DTI switch options
  • Table 369 2 MB DTI switch options
  • Table 370 Faceplate LEDs
  • Table 371 Faceplate LEDs
  • Table 372 Faceplate LEDs
  • Table 373 System clock specification and characteristics
  • Table 374 System clock specification and characteristics
  • Table 375 System clock specification and characteristics
  • Table 376 NTAK79 LEDs
  • Table 377 NTAK79 LEDs
  • Table 378 NTAK79 LEDs
  • Table 379 Switch SW1
  • Table 380 Switch SW2
  • Table 381 Switch SW3
  • Table 382 Switch SW4
  • Table 383 Switch SW1
  • Table 384 Switch SW2
  • Table 385 Switch SW3
  • Table 386 Switch SW4
  • Table 387 Digital pad values and offset allocations
  • Table 388 Digital Pad - values and offset allocations
  • Table 389 Digital pad values and offset allocations
  • Table 390 Impedance matching switch selection
  • Table 391 Impedance matching switch selection
  • Table 392 Impedance matching switch selection
  • Table 393 Carrier shield grounding switch settings
  • Table 394 Carrier shield grounding switch settings
  • Table 395 Carrier shield grounding switch settings
  • Table 396 Settings for the DCHI dip switch (SW1)
  • Table 397 Settings for the DCHI dip switch (SW1)
  • Table 398 Settings for the DCHI dip switch (SW1)
  • Table 399 Faceplate LEDs
  • Table 400 Faceplate LEDs
  • Table 401 Faceplate LEDs
  • Table 402 NTBK50 faceplate LEDs
  • Table 403 NTBK50 faceplate LEDs
  • Table 404 NTBK50 faceplate LEDs
  • Table 405 Digital Pad - values and offset allocations
  • Table 406 Digital Pad - values and offset allocations
  • Table 407 Digital pad values and offset allocations
  • Table 408 Impedance matching switch settings
  • Table 409 Impedance matching switch settings
  • Table 410 Impedance matching switch settings
  • Table 411 Carrier Shield grounding switch settings
  • Table 412 Carrier Shield grounding switch settings
  • Table 413 Carrier shield grounding switch settings
  • Table 414 Carrier Shield grounding switch settings
  • Table 415 Settings for the DCHI dip switch (SW1)
  • Table 416 Settings for the DCHI dip switch (SW1)
  • Table 417 Settings for the DCHI dip switch (SW1)
  • Table 418 Faceplate LED
  • Table 419 Faceplate LEDs
  • Table 420 Faceplate LED
  • Table 421 NTCK16 circuit card power requirements
  • Table 422 NTCK16 circuit card environmental specifications
  • Table 423 NTCK16 pad switching
  • Table 424 Expansion daughterboards
  • Table 425 Default SDI port settings on the NTDK20 SSC card
  • Table 426 Media Gateway and Media Gateway Expansion slot assignments
  • Table 427 Faceplate display
  • Table 428 Status LED functionality
  • Table 429 Call server redundancy status
  • Table 430 DSP daughterboard placement
  • Table 431 Faceplate display
  • Table 432 NTRB21 LED states
  • Table 433 NTRB21 LED states
  • Table 434 NTRB21 LED states
  • Table 435 Digital pad values and offset allocations
  • Table 436 Digital pad values and offset allocations
  • Table 437 Digital pad values and offset allocations
  • Table 438 NTRB21 switch settings
  • Table 439 NTRB21 switch settings
  • Table 440 DS-1 line interface pinout for NTBK04 cable
  • Table 441 DS-1 line interface pinout for NTBK04 cable
  • Table 442 DS-1 line interface pinout for NTBK04 cable
  • Table 443 Characteristics of synchronous ports
  • Table 444 QPC513 interconnection specifications
  • Table 445 Connector J1 and J2 pin assignments - RS-232-C interface
  • Table 446 Connector J1 and J2 pin assignments - high-speed interface
  • Table 447 ESDI card address switch settings
  • Table 448 ESDI card DTE/DCE mode jumper settings
  • Table 449 ESDI card RS-232-C/high-speed interface jumper settings
  • Table 450 LD 17 - Serial port configuration parameters.
  • Table 451 Connector J1 pin assignments
  • Table 452 Connector J2 pin assignments
  • Table 453 QSDI card address switch settings
  • Table 454 QSDI card baud rate switch settings
  • Table 455 QSDI card DTE/DCE mode switch settings
  • Table 456 LD 17 - Serial port configuration parameters
  • Table 457 NTAK03, NTDK20, and NTDK97 Mu-Law tones and cadence
  • Table 458 NTAK03, NTDK20, and NTDK97 A-Law tones and cadences
  • Table 459 LAPB frame structure
  • Table 460 Commands and responses
• Procedures
  • Procedure 1 Installing a trunk card
  • Procedure 2 Installing a circuit card
  • Procedure 3 Testing conference cards
  • Procedure 4 Testing digitone receiver cards
  • Procedure 5 Testing line cards
  • Procedure 6 Testing multifrequency sender cards
  • Procedure 7 Testing multifrequency signaling cards
  • Procedure 8 Testing network cards
  • Procedure 9 Testing a trunk card using a maintenance telephone
  • Procedure 10 Testing a trunk card using a system terminal
  • Procedure 11 Testing tone and digit switch cards
  • Procedure 12
  • Procedure 13 Connecting to the MDF
  • Procedure 14 Connecting two or more Lineside T1 cards to the MMI terminal
  • Procedure 15 Connecting two or more LEIs to the MMI terminal
  • Procedure 16 Installing the NT5D97
  • Procedure 17 Removing the NT5D97
  • Procedure 18 Installing the MSDL card
  • Procedure 19 Cabling the MSDL card to the PRI card
  • Procedure 20 Cabling the MSDL card to the I/O panel
  • Procedure 21 Replacing an MSDL card