Hitachi 9900 Series - Manual (Page 41)

Internal Switching Overcomes the Limitations of Shared Bus Architectures
It can be seen from Figure 24 that a reduction occurs in the OLTP performance for
the shared bus architecture of the 7700E system. This occurs at Point 1, when the DSS
application begins at about 45 minutes into the test. It depicts the effect that the DSS
application (full table scans) has on the OLTP workload due to the fact that both
applications compete for bus bandwidth. In the Lightning 9900
™ Series system, with its
Hi-Star ™ architecture, however, each workload essentially has its own internally routed
paths. This means that the main reason for performance decline for the OLTP application
i.e., bus contention, does not occur when the DSS application starts. Although there may
be some contention at the cache, there are 16 simultaneous operations concurrently
happening at the cache. This far exceeds the demands of most application requirements,
which can be measured with the limited multiple shared bus architectures on the market
today.
Test Results
The DSS application starts performing full table scans while the OLTP application
has been running by itself for approximately 45 minutes. The 9960’s OLTP application
started at a Transaction Per Minute (TPM) rate of about 2350 and sustained this rate
during the start of the DSS application and throughout the DSS application’s run. The
9960’s DSS application started with a transfer rate of about 220MB/sec or over 2.3 million
rows per second. There was no reduction in TPM.
In other words, the DSS application did NOT affect the 9960’s OLTP application
performance as it does on the shared bus controller system.
Also when the 9960’s OLTP application completes the DSS application’s transfer rate is
maintained at 220MB/sec or over 2.3 million rows per second. Again, there is no reduction
in MB/sec or rows per second with the Lightning 9900
™ Series.
Bottleneck-free
performance with the
Lightning 9900
™ Series.
Hitachi Data Systems
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