Motorola MVME2300 Series - Manual (Page 282)

Index
IN-8 Computer Group Literature Center Web Site
I
N
D
E
X
status bit, definition of xxiii
symbols, use of xxii
syndrome codes, ECC (Falcon chip set) 3-57
System Configuration register (SYSCR) 1-25
System External Cache Control register (SX-
CCR) 1-29
T
Timer registers (Raven MPIC)
Base Count registers 2-78
Current Count registers 2-78
Destination registers 2-80
Frequency register 2-77
Vector/Priority registers 2-79
timing (DRAM access) 3-7 , 3-8 , 3-9
timing (ROM/Flash access) 3-10
transaction ordering (Raven PCI Bridge
ASIC) 2-29
triple- (or greater) bit errors (Falcon chip set)
3-13
true, use of xxiii
U
UCSR access mechanisms 4-9
underscore (_), meaning of xxiii
Universe (VMEbus to PCI) interface chip 4-1
architectural diagram 4-4
as PCI master 4-6
as PCI slave 4-5
as VMEbus master 4-5
as VMEbus slave 4-4
byte ordering 5-14
chip problems after PCI reset 4-14 , 5-9
Control and Status registers (UCSR) 4-8
interrupter and interrupt handler 4-6
PCI Register values for CHRP memory
map 1-15
PCI register values for PREP memory
map 1-19
PCI register values for VMEbus slave
map 1-23
register map 4-9
upper/lower chip status bit (Falcon chip set)
3-32
V
Vendor ID/Device ID registers 2-32 , 2-49
Vendor Identification register (RavenMPIC)
2-75
Vendor/Device register (Falcon chip set)
3-30
VME Geographical Address register
(VGAR) 1-43
VME registers 1-37
VMEbus
interface 4-4
interrupt handling (Universe ASIC) 4-7
mapping 1-20
master map 1-20
slave map 1-21 , 1-24
Universe ASIC and 4-1
W
W83C553 PIB registers 1-31
Watchdog Timer registers 1-32
word, definition of xxiii
write posting (Raven PCI Bridge ASIC) 2-17
writing to control registers (Falcon chip set)
3-53
Z
Z8536 emulation (CIO port pins) 1-44