Motorola MC68VZ328 - Manual (Page 129)

LCD Controller 8-1
Chapter 8
LCD Controller
This chapter describes the operation of the liquid crystal display (LCD) controller and supplies the
programming information necessary to implement it in design projects. The LCD controller provides
display data for external LCD drivers or for an LCD panel. The LCD controller fetches display data
directly from system memory through periodic DMA transfer cycles. For this reason, an understanding of
the DRAM controller is recommended. For more information, please refer to Chapter 7, “DRAM
Controller.” The LCD controller uses very little bus bandwidth, giving the core sufficient processing time.
8.1 LCD Controller Features
The following list describes the features of the LCD controller.
• Both system and display memory that is shared, so that dedicated video memory is not required
• Standard panel interface for industry-standard LCD drivers
• Support for single (nonsplit) monochrome screen and color STN LCD panels through preprocessing
of image data with software
• Fast fly-by-type, 16-bit-wide, burst DMA screen-refresh transfers from system memory
• Maximum display size of 640 × 512 pixels
• Panel interface for 8-, 4-, 2-, and 1-bit-wide LCD data bus
• 16 simultaneous grayscale levels from a palette of 16 density levels
• Hardware blinking cursor that is programmable to a maximum of 31 × 31 pixels
• Hardware panning (soft horizontal and vertical scrolling)
• 8-bit PWM for software contrast control
• New FRC algorithm that improves the flickering effect found in 4- and 16-grayscale LCD panels
• Support for self-refresh-type LCD panels