Fibre channel* (u23) - optional – Intel NetStructure MPCBL0001 User Manual

Page 24

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Technical Product Specification

Order #273817

Intel NetStructure

®

MPCBL0001 High Performance Single Board Computer

Contents

•

Supports advanced PCI commands such as MWI, MRM, and MRL, and PCI-X commands
such as MRD, MRB, and MWB

•

Full IEEE 802.3ab auto-negotiation of speed, duplex, and flow-control configuration

•

Complete full duplex and half duplex support

•

Automatic MDI crossover operation for 100Base-TX and 10Base-T modes

•

Automatic polarity correction

•

Digital implementation of adaptive equalizer and canceller for echo and crosstalk

2.2.4.5

Fibre Channel*

(U23) - Optional

The QLogic* ISP2312 dual Fibre Channel controller is used for access to high-speed storage
subsystems. It is routed through backplane connector P23.

See

Figure 20, “Component Layout (#1)” on page 100

for its location.

This controller supports PCI and PCI-X bus interfaces. Burst mode master DMA transfers are
utilized for efficient usage of bus bandwidth during data transfers, and 8, 16, and 32-bit accesses
are supported as a PCI target. The controller appears as two independent Fibre Channel ports. A
PCI function is assigned to each port in the device’s PCI configuration space. Functions 0 and 1 are
used to configure FC ports 1 and 2, respectively.

ISP2312 features include:

•

32/64-bit 33/66 MHz, PCI Rev 2.2 compliant interface.

•

Host interface compliant with the PCI-X addendum, Rev 1.0a, from 50 to 133 MHz.

•

Supports 64-bit addressing (addresses >32 bit initiate use of DAC address cycle).

•

Efficient PCI bus master operation, supported by optimized internal DMA controller.

•

Supports advanced PCI commands such as MWI, MRM, and MRL, and PCI-X commands
such as MRD, MRB, and MWB.

•

Automatically negotiates Fibre Channel bit rate 1.06 Gbits/s (through backplane or front
panel) or 2.12 Gbits/s (through front-panel Fibre Channel ports only)

•

Supports up to 533 MBytes sustained FC data transfer rate (combined bandwidth of both
directions transmitting simultaneously).

•

Supports Fibre Channel-arbitrated loop (FC-AL), FC-AL-2, point-to-point, and switched
fabric topologies.

•

Maxim MAX3840 2x2 crosspoint switch for switching Fibre Channel between the front ports
and the backplane, either via the BIOS Setup Menu by electronic keying.

•

Each FC port includes:

— Internal RISC processor

— Receive DMA sequencer

— Frame buffer

— DMA channels (transmit, receive, command, auto-request, and auto-response)

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