IBM 560 - Manual (Page 49)

System Control Port B (Hex 0061)
Bit definitions for the write and read functions of this port are shown
in the following figures:
Figure 2-30. System Control Port B (Hex 0061, Write)
Bit Function
7–4 Reserved
3 Reserved (should be 0)
2 Enable parity check
1 Enable speaker data
0 Timer 2 gate to speaker
Figure 2-31. System Control Port B (Hex 0061, Read)
Bit Function
7 Parity check
6 Channel check
5 Timer 2 output
4 Toggles with each refresh request
3 Reserved
2 Enable parity check
1 Enable speaker data
0 Timer 2 gate to speaker
Bit 7 When set to 1, this bit indicates that the PCI System Error
(SERR#) was pulsed active.
Bit 6 When set to 1, this bit indicates a channel check has
occurred.
Bit 5 When read, this bit indicates the condition of the
timer/counter 2 ‘output’ signal.
Bit 4 When read, this bit toggles for each refresh request.
Bit 3 Reserved.
Bit 2 When set to 0, this bit enables the PCI System Error
(SERR#). This bit is set to 1 during a power-on reset.
Bit 1 When set to 1, this bit enables the speaker data.
Bit 0 When set to 1, this bit enables the timer 2 gate.
ThinkPad 560/560E System Board 2-27