Spectrum Brands Quad C6x VME64 - Manual (Page 89)

Spectrum Signal Processing Monaco Technical Reference
SCV64 Register Values
Part Number 500-00191 77
Revision 2.00
Index
A
A24 slave interface reset, 5
arbitration
global shared bus, 19
Auto-Syscon capability, 27
B
backplane connectors
VME bus, 23
base address, VME
A24 slave interface
setting via jumpers, 7
block diagram, 4
processor node, 10
board layout diagram, 6
boot mode
setting via jumpers, 7
boot source of DSP, setting, 16
booting
DSP, 16
burst cycle global shared bus access, 20
bus
global shared. See global shared bus
VME
backplane connectors, 23
interface, 23
SCV64 VME64
master, 27
primary slave, 23
secondary slave, 24
operation, 23
bus error interrupts, 43
C
C6x. See DSP
CE1 - external-memory space, 14
chain, JTAG, 37
clear interrupt
to node A, 49
to node B, 50
to node C, 51
to node D, 52
clock speed, 1
configurations
DSP processor, 9
configuring
Hurricane, 33
connector, 63
JTAG, 73
IN, 73
OUT, 73
layout, 63
PEM, 71
PEM 1, 71
PEM 2, 72
PMC, 67
JN1, 67
JN2, 68
JN4, 69
JN5, 70
VME
P1, 64
P2
DSP~LINK3 to VME, 66
PMC to VME, 65
D
data throughput specifications, 61
data transfer operating modes
DSP~LINK3, 29
Address Strobe Control, 30
debugging, JTAG, 37
DSP
booting, 16
jumpers to set boot source, 16
identifying which processor the
software is running on, 55
memory configuration, 11
memory map, 13
external-memory space CE1, 14
processor configurations, 9
registers
Host Port Interface register addresses, 26
internal peripheral, 12
DSP~LINK3
connector to VME, 66
data transfer operating modes, 29
Address Strobe Control, 30
interface, 29
signals, 31